{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.1 Build 222 10/21/2009 SJ Full Version " "Info: Version 9.1 Build 222 10/21/2009 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Mon May 28 14:22:32 2012 " "Info: Processing started: Mon May 28 14:22:32 2012" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off myArkanoid -c myArkanoid --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off myArkanoid -c myArkanoid --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Info: Parallel compilation is enabled and will use 2 of the 2 processors detected" {  } {  } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk_50MHz " "Info: Assuming node \"clk_50MHz\" is an undefined clock" {  } { { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { -168 -72 96 -152 "clk_50MHz" "" } } } } { "c:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "clk_50MHz" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0 -1}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0 -1}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "1 " "Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "ClockDivider:inst1\|clk25MHz_ " "Info: Detected ripple clock \"ClockDivider:inst1\|clk25MHz_\" as buffer" {  } { { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } } { "c:/quartus/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/quartus/quartus/bin/Assignment Editor.qase" 1 { { 0 "ClockDivider:inst1\|clk25MHz_" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0 "" 0 -1}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0 "" 0 -1}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk_50MHz register Arkanoid:inst\|platform1_position\[3\] register Arkanoid:inst\|hex0_\[6\] 7.55 MHz 132.461 ns Internal " "Info: Clock \"clk_50MHz\" has Internal fmax of 7.55 MHz between source register \"Arkanoid:inst\|platform1_position\[3\]\" and destination register \"Arkanoid:inst\|hex0_\[6\]\" (period= 132.461 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "132.203 ns + Longest register register " "Info: + Longest register to register delay is 132.203 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Arkanoid:inst\|platform1_position\[3\] 1 REG LCFF_X33_Y12_N7 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X33_Y12_N7; Fanout = 4; REG Node = 'Arkanoid:inst\|platform1_position\[3\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { Arkanoid:inst|platform1_position[3] } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.188 ns) + CELL(0.178 ns) 1.366 ns Arkanoid:inst\|platform1_position~64 2 COMB LCCOMB_X34_Y12_N6 1 " "Info: 2: + IC(1.188 ns) + CELL(0.178 ns) = 1.366 ns; Loc. = LCCOMB_X34_Y12_N6; Fanout = 1; COMB Node = 'Arkanoid:inst\|platform1_position~64'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.366 ns" { Arkanoid:inst|platform1_position[3] Arkanoid:inst|platform1_position~64 } "NODE_NAME" } } { "arkanoid_header.v" "" { Text "G:/Verilog/Arkanoid2PDE1/arkanoid_header.v" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.313 ns) + CELL(0.512 ns) 2.191 ns Arkanoid:inst\|platform1_position~68 3 COMB LCCOMB_X34_Y12_N14 1 " "Info: 3: + IC(0.313 ns) + CELL(0.512 ns) = 2.191 ns; Loc. = LCCOMB_X34_Y12_N14; Fanout = 1; COMB Node = 'Arkanoid:inst\|platform1_position~68'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.825 ns" { Arkanoid:inst|platform1_position~64 Arkanoid:inst|platform1_position~68 } "NODE_NAME" } } { "arkanoid_header.v" "" { Text "G:/Verilog/Arkanoid2PDE1/arkanoid_header.v" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.830 ns) + CELL(0.521 ns) 3.542 ns Arkanoid:inst\|platform1_position~74 4 COMB LCCOMB_X34_Y11_N0 32 " "Info: 4: + IC(0.830 ns) + CELL(0.521 ns) = 3.542 ns; Loc. = LCCOMB_X34_Y11_N0; Fanout = 32; COMB Node = 'Arkanoid:inst\|platform1_position~74'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.351 ns" { Arkanoid:inst|platform1_position~68 Arkanoid:inst|platform1_position~74 } "NODE_NAME" } } { "arkanoid_header.v" "" { Text "G:/Verilog/Arkanoid2PDE1/arkanoid_header.v" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.490 ns) + CELL(0.322 ns) 5.354 ns Arkanoid:inst\|Add2~80 5 COMB LCCOMB_X34_Y9_N28 5 " "Info: 5: + IC(1.490 ns) + CELL(0.322 ns) = 5.354 ns; Loc. = LCCOMB_X34_Y9_N28; Fanout = 5; COMB Node = 'Arkanoid:inst\|Add2~80'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.812 ns" { Arkanoid:inst|platform1_position~74 Arkanoid:inst|Add2~80 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.926 ns) + CELL(0.455 ns) 6.735 ns Arkanoid:inst\|LessThan1~6 6 COMB LCCOMB_X34_Y13_N4 1 " "Info: 6: + IC(0.926 ns) + CELL(0.455 ns) = 6.735 ns; Loc. = LCCOMB_X34_Y13_N4; Fanout = 1; COMB Node = 'Arkanoid:inst\|LessThan1~6'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.381 ns" { Arkanoid:inst|Add2~80 Arkanoid:inst|LessThan1~6 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 53 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.298 ns) + CELL(0.491 ns) 7.524 ns Arkanoid:inst\|LessThan1~9 7 COMB LCCOMB_X34_Y13_N8 1 " "Info: 7: + IC(0.298 ns) + CELL(0.491 ns) = 7.524 ns; Loc. = LCCOMB_X34_Y13_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|LessThan1~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.789 ns" { Arkanoid:inst|LessThan1~6 Arkanoid:inst|LessThan1~9 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 53 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.303 ns) + CELL(0.322 ns) 8.149 ns Arkanoid:inst\|LessThan1~10 8 COMB LCCOMB_X34_Y13_N26 2 " "Info: 8: + IC(0.303 ns) + CELL(0.322 ns) = 8.149 ns; Loc. = LCCOMB_X34_Y13_N26; Fanout = 2; COMB Node = 'Arkanoid:inst\|LessThan1~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.625 ns" { Arkanoid:inst|LessThan1~9 Arkanoid:inst|LessThan1~10 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 53 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.901 ns) + CELL(0.517 ns) 9.567 ns Arkanoid:inst\|Add3~1 9 COMB LCCOMB_X35_Y12_N0 2 " "Info: 9: + IC(0.901 ns) + CELL(0.517 ns) = 9.567 ns; Loc. = LCCOMB_X35_Y12_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.418 ns" { Arkanoid:inst|LessThan1~10 Arkanoid:inst|Add3~1 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.647 ns Arkanoid:inst\|Add3~3 10 COMB LCCOMB_X35_Y12_N2 2 " "Info: 10: + IC(0.000 ns) + CELL(0.080 ns) = 9.647 ns; Loc. = LCCOMB_X35_Y12_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~1 Arkanoid:inst|Add3~3 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.727 ns Arkanoid:inst\|Add3~5 11 COMB LCCOMB_X35_Y12_N4 2 " "Info: 11: + IC(0.000 ns) + CELL(0.080 ns) = 9.727 ns; Loc. = LCCOMB_X35_Y12_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~3 Arkanoid:inst|Add3~5 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.807 ns Arkanoid:inst\|Add3~7 12 COMB LCCOMB_X35_Y12_N6 2 " "Info: 12: + IC(0.000 ns) + CELL(0.080 ns) = 9.807 ns; Loc. = LCCOMB_X35_Y12_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~5 Arkanoid:inst|Add3~7 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.887 ns Arkanoid:inst\|Add3~9 13 COMB LCCOMB_X35_Y12_N8 2 " "Info: 13: + IC(0.000 ns) + CELL(0.080 ns) = 9.887 ns; Loc. = LCCOMB_X35_Y12_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~7 Arkanoid:inst|Add3~9 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 9.967 ns Arkanoid:inst\|Add3~11 14 COMB LCCOMB_X35_Y12_N10 2 " "Info: 14: + IC(0.000 ns) + CELL(0.080 ns) = 9.967 ns; Loc. = LCCOMB_X35_Y12_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~11'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~9 Arkanoid:inst|Add3~11 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 10.047 ns Arkanoid:inst\|Add3~13 15 COMB LCCOMB_X35_Y12_N12 2 " "Info: 15: + IC(0.000 ns) + CELL(0.080 ns) = 10.047 ns; Loc. = LCCOMB_X35_Y12_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~13'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~11 Arkanoid:inst|Add3~13 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 10.221 ns Arkanoid:inst\|Add3~15 16 COMB LCCOMB_X35_Y12_N14 2 " "Info: 16: + IC(0.000 ns) + CELL(0.174 ns) = 10.221 ns; Loc. = LCCOMB_X35_Y12_N14; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~15'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|Add3~13 Arkanoid:inst|Add3~15 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 10.301 ns Arkanoid:inst\|Add3~17 17 COMB LCCOMB_X35_Y12_N16 2 " "Info: 17: + IC(0.000 ns) + CELL(0.080 ns) = 10.301 ns; Loc. = LCCOMB_X35_Y12_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~17'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~15 Arkanoid:inst|Add3~17 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 10.381 ns Arkanoid:inst\|Add3~19 18 COMB LCCOMB_X35_Y12_N18 2 " "Info: 18: + IC(0.000 ns) + CELL(0.080 ns) = 10.381 ns; Loc. = LCCOMB_X35_Y12_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~19'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~17 Arkanoid:inst|Add3~19 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 10.461 ns Arkanoid:inst\|Add3~21 19 COMB LCCOMB_X35_Y12_N20 2 " "Info: 19: + IC(0.000 ns) + CELL(0.080 ns) = 10.461 ns; Loc. = LCCOMB_X35_Y12_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~21'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~19 Arkanoid:inst|Add3~21 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 10.541 ns Arkanoid:inst\|Add3~23 20 COMB LCCOMB_X35_Y12_N22 2 " "Info: 20: + IC(0.000 ns) + CELL(0.080 ns) = 10.541 ns; Loc. = LCCOMB_X35_Y12_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~23'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~21 Arkanoid:inst|Add3~23 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 10.621 ns Arkanoid:inst\|Add3~25 21 COMB LCCOMB_X35_Y12_N24 2 " "Info: 21: + IC(0.000 ns) + CELL(0.080 ns) = 10.621 ns; Loc. = LCCOMB_X35_Y12_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~25'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~23 Arkanoid:inst|Add3~25 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 10.701 ns Arkanoid:inst\|Add3~27 22 COMB LCCOMB_X35_Y12_N26 2 " "Info: 22: + IC(0.000 ns) + CELL(0.080 ns) = 10.701 ns; Loc. = LCCOMB_X35_Y12_N26; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~27'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add3~25 Arkanoid:inst|Add3~27 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 11.159 ns Arkanoid:inst\|Add3~28 23 COMB LCCOMB_X35_Y12_N28 2 " "Info: 23: + IC(0.000 ns) + CELL(0.458 ns) = 11.159 ns; Loc. = LCCOMB_X35_Y12_N28; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add3~28'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|Add3~27 Arkanoid:inst|Add3~28 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 54 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.165 ns) + CELL(0.178 ns) 12.502 ns Arkanoid:inst\|platform1_position~127 24 COMB LCCOMB_X34_Y9_N12 3 " "Info: 24: + IC(1.165 ns) + CELL(0.178 ns) = 12.502 ns; Loc. = LCCOMB_X34_Y9_N12; Fanout = 3; COMB Node = 'Arkanoid:inst\|platform1_position~127'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.343 ns" { Arkanoid:inst|Add3~28 Arkanoid:inst|platform1_position~127 } "NODE_NAME" } } { "arkanoid_header.v" "" { Text "G:/Verilog/Arkanoid2PDE1/arkanoid_header.v" 93 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.159 ns) + CELL(0.517 ns) 14.178 ns Arkanoid:inst\|Add13~29 25 COMB LCCOMB_X35_Y8_N28 2 " "Info: 25: + IC(1.159 ns) + CELL(0.517 ns) = 14.178 ns; Loc. = LCCOMB_X35_Y8_N28; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~29'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.676 ns" { Arkanoid:inst|platform1_position~127 Arkanoid:inst|Add13~29 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 14.339 ns Arkanoid:inst\|Add13~31 26 COMB LCCOMB_X35_Y8_N30 2 " "Info: 26: + IC(0.000 ns) + CELL(0.161 ns) = 14.339 ns; Loc. = LCCOMB_X35_Y8_N30; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~31'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.161 ns" { Arkanoid:inst|Add13~29 Arkanoid:inst|Add13~31 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.419 ns Arkanoid:inst\|Add13~33 27 COMB LCCOMB_X35_Y7_N0 2 " "Info: 27: + IC(0.000 ns) + CELL(0.080 ns) = 14.419 ns; Loc. = LCCOMB_X35_Y7_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~33'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~31 Arkanoid:inst|Add13~33 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.499 ns Arkanoid:inst\|Add13~35 28 COMB LCCOMB_X35_Y7_N2 2 " "Info: 28: + IC(0.000 ns) + CELL(0.080 ns) = 14.499 ns; Loc. = LCCOMB_X35_Y7_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~35'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~33 Arkanoid:inst|Add13~35 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.579 ns Arkanoid:inst\|Add13~37 29 COMB LCCOMB_X35_Y7_N4 2 " "Info: 29: + IC(0.000 ns) + CELL(0.080 ns) = 14.579 ns; Loc. = LCCOMB_X35_Y7_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~37'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~35 Arkanoid:inst|Add13~37 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.659 ns Arkanoid:inst\|Add13~39 30 COMB LCCOMB_X35_Y7_N6 2 " "Info: 30: + IC(0.000 ns) + CELL(0.080 ns) = 14.659 ns; Loc. = LCCOMB_X35_Y7_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~39'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~37 Arkanoid:inst|Add13~39 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.739 ns Arkanoid:inst\|Add13~41 31 COMB LCCOMB_X35_Y7_N8 2 " "Info: 31: + IC(0.000 ns) + CELL(0.080 ns) = 14.739 ns; Loc. = LCCOMB_X35_Y7_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~41'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~39 Arkanoid:inst|Add13~41 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.819 ns Arkanoid:inst\|Add13~43 32 COMB LCCOMB_X35_Y7_N10 2 " "Info: 32: + IC(0.000 ns) + CELL(0.080 ns) = 14.819 ns; Loc. = LCCOMB_X35_Y7_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~43'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~41 Arkanoid:inst|Add13~43 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 14.899 ns Arkanoid:inst\|Add13~45 33 COMB LCCOMB_X35_Y7_N12 2 " "Info: 33: + IC(0.000 ns) + CELL(0.080 ns) = 14.899 ns; Loc. = LCCOMB_X35_Y7_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~45'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~43 Arkanoid:inst|Add13~45 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 15.073 ns Arkanoid:inst\|Add13~47 34 COMB LCCOMB_X35_Y7_N14 2 " "Info: 34: + IC(0.000 ns) + CELL(0.174 ns) = 15.073 ns; Loc. = LCCOMB_X35_Y7_N14; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~47'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|Add13~45 Arkanoid:inst|Add13~47 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.153 ns Arkanoid:inst\|Add13~49 35 COMB LCCOMB_X35_Y7_N16 2 " "Info: 35: + IC(0.000 ns) + CELL(0.080 ns) = 15.153 ns; Loc. = LCCOMB_X35_Y7_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~49'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~47 Arkanoid:inst|Add13~49 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 15.233 ns Arkanoid:inst\|Add13~51 36 COMB LCCOMB_X35_Y7_N18 2 " "Info: 36: + IC(0.000 ns) + CELL(0.080 ns) = 15.233 ns; Loc. = LCCOMB_X35_Y7_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~51'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add13~49 Arkanoid:inst|Add13~51 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 15.691 ns Arkanoid:inst\|Add13~52 37 COMB LCCOMB_X35_Y7_N20 2 " "Info: 37: + IC(0.000 ns) + CELL(0.458 ns) = 15.691 ns; Loc. = LCCOMB_X35_Y7_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add13~52'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|Add13~51 Arkanoid:inst|Add13~52 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.820 ns) + CELL(0.517 ns) 17.028 ns Arkanoid:inst\|LessThan143~53 38 COMB LCCOMB_X34_Y7_N20 1 " "Info: 38: + IC(0.820 ns) + CELL(0.517 ns) = 17.028 ns; Loc. = LCCOMB_X34_Y7_N20; Fanout = 1; COMB Node = 'Arkanoid:inst\|LessThan143~53'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.337 ns" { Arkanoid:inst|Add13~52 Arkanoid:inst|LessThan143~53 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 17.108 ns Arkanoid:inst\|LessThan143~55 39 COMB LCCOMB_X34_Y7_N22 1 " "Info: 39: + IC(0.000 ns) + CELL(0.080 ns) = 17.108 ns; Loc. = LCCOMB_X34_Y7_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|LessThan143~55'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|LessThan143~53 Arkanoid:inst|LessThan143~55 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 17.188 ns Arkanoid:inst\|LessThan143~57 40 COMB LCCOMB_X34_Y7_N24 1 " "Info: 40: + IC(0.000 ns) + CELL(0.080 ns) = 17.188 ns; Loc. = LCCOMB_X34_Y7_N24; Fanout = 1; COMB Node = 'Arkanoid:inst\|LessThan143~57'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|LessThan143~55 Arkanoid:inst|LessThan143~57 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 17.268 ns Arkanoid:inst\|LessThan143~59 41 COMB LCCOMB_X34_Y7_N26 1 " "Info: 41: + IC(0.000 ns) + CELL(0.080 ns) = 17.268 ns; Loc. = LCCOMB_X34_Y7_N26; Fanout = 1; COMB Node = 'Arkanoid:inst\|LessThan143~59'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|LessThan143~57 Arkanoid:inst|LessThan143~59 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 17.348 ns Arkanoid:inst\|LessThan143~61 42 COMB LCCOMB_X34_Y7_N28 1 " "Info: 42: + IC(0.000 ns) + CELL(0.080 ns) = 17.348 ns; Loc. = LCCOMB_X34_Y7_N28; Fanout = 1; COMB Node = 'Arkanoid:inst\|LessThan143~61'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|LessThan143~59 Arkanoid:inst|LessThan143~61 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 17.806 ns Arkanoid:inst\|LessThan143~62 43 COMB LCCOMB_X34_Y7_N30 3 " "Info: 43: + IC(0.000 ns) + CELL(0.458 ns) = 17.806 ns; Loc. = LCCOMB_X34_Y7_N30; Fanout = 3; COMB Node = 'Arkanoid:inst\|LessThan143~62'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|LessThan143~61 Arkanoid:inst|LessThan143~62 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 217 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.097 ns) + CELL(0.178 ns) 19.081 ns Arkanoid:inst\|always2~6 44 COMB LCCOMB_X29_Y7_N0 3 " "Info: 44: + IC(1.097 ns) + CELL(0.178 ns) = 19.081 ns; Loc. = LCCOMB_X29_Y7_N0; Fanout = 3; COMB Node = 'Arkanoid:inst\|always2~6'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.275 ns" { Arkanoid:inst|LessThan143~62 Arkanoid:inst|always2~6 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(2.158 ns) + CELL(0.495 ns) 21.734 ns Arkanoid:inst\|Add14~1 45 COMB LCCOMB_X34_Y19_N0 2 " "Info: 45: + IC(2.158 ns) + CELL(0.495 ns) = 21.734 ns; Loc. = LCCOMB_X34_Y19_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "2.653 ns" { Arkanoid:inst|always2~6 Arkanoid:inst|Add14~1 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 21.814 ns Arkanoid:inst\|Add14~3 46 COMB LCCOMB_X34_Y19_N2 2 " "Info: 46: + IC(0.000 ns) + CELL(0.080 ns) = 21.814 ns; Loc. = LCCOMB_X34_Y19_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~1 Arkanoid:inst|Add14~3 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 21.894 ns Arkanoid:inst\|Add14~5 47 COMB LCCOMB_X34_Y19_N4 2 " "Info: 47: + IC(0.000 ns) + CELL(0.080 ns) = 21.894 ns; Loc. = LCCOMB_X34_Y19_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~3 Arkanoid:inst|Add14~5 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 21.974 ns Arkanoid:inst\|Add14~7 48 COMB LCCOMB_X34_Y19_N6 2 " "Info: 48: + IC(0.000 ns) + CELL(0.080 ns) = 21.974 ns; Loc. = LCCOMB_X34_Y19_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~5 Arkanoid:inst|Add14~7 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.054 ns Arkanoid:inst\|Add14~9 49 COMB LCCOMB_X34_Y19_N8 2 " "Info: 49: + IC(0.000 ns) + CELL(0.080 ns) = 22.054 ns; Loc. = LCCOMB_X34_Y19_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~7 Arkanoid:inst|Add14~9 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.134 ns Arkanoid:inst\|Add14~11 50 COMB LCCOMB_X34_Y19_N10 2 " "Info: 50: + IC(0.000 ns) + CELL(0.080 ns) = 22.134 ns; Loc. = LCCOMB_X34_Y19_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~11'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~9 Arkanoid:inst|Add14~11 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.214 ns Arkanoid:inst\|Add14~13 51 COMB LCCOMB_X34_Y19_N12 2 " "Info: 51: + IC(0.000 ns) + CELL(0.080 ns) = 22.214 ns; Loc. = LCCOMB_X34_Y19_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~13'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~11 Arkanoid:inst|Add14~13 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 22.388 ns Arkanoid:inst\|Add14~15 52 COMB LCCOMB_X34_Y19_N14 2 " "Info: 52: + IC(0.000 ns) + CELL(0.174 ns) = 22.388 ns; Loc. = LCCOMB_X34_Y19_N14; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~15'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|Add14~13 Arkanoid:inst|Add14~15 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.468 ns Arkanoid:inst\|Add14~17 53 COMB LCCOMB_X34_Y19_N16 2 " "Info: 53: + IC(0.000 ns) + CELL(0.080 ns) = 22.468 ns; Loc. = LCCOMB_X34_Y19_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~17'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~15 Arkanoid:inst|Add14~17 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.548 ns Arkanoid:inst\|Add14~19 54 COMB LCCOMB_X34_Y19_N18 2 " "Info: 54: + IC(0.000 ns) + CELL(0.080 ns) = 22.548 ns; Loc. = LCCOMB_X34_Y19_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~19'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~17 Arkanoid:inst|Add14~19 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.628 ns Arkanoid:inst\|Add14~21 55 COMB LCCOMB_X34_Y19_N20 2 " "Info: 55: + IC(0.000 ns) + CELL(0.080 ns) = 22.628 ns; Loc. = LCCOMB_X34_Y19_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~21'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~19 Arkanoid:inst|Add14~21 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.708 ns Arkanoid:inst\|Add14~23 56 COMB LCCOMB_X34_Y19_N22 2 " "Info: 56: + IC(0.000 ns) + CELL(0.080 ns) = 22.708 ns; Loc. = LCCOMB_X34_Y19_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~23'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~21 Arkanoid:inst|Add14~23 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.788 ns Arkanoid:inst\|Add14~25 57 COMB LCCOMB_X34_Y19_N24 2 " "Info: 57: + IC(0.000 ns) + CELL(0.080 ns) = 22.788 ns; Loc. = LCCOMB_X34_Y19_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~25'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~23 Arkanoid:inst|Add14~25 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.868 ns Arkanoid:inst\|Add14~27 58 COMB LCCOMB_X34_Y19_N26 2 " "Info: 58: + IC(0.000 ns) + CELL(0.080 ns) = 22.868 ns; Loc. = LCCOMB_X34_Y19_N26; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~27'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~25 Arkanoid:inst|Add14~27 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 22.948 ns Arkanoid:inst\|Add14~29 59 COMB LCCOMB_X34_Y19_N28 2 " "Info: 59: + IC(0.000 ns) + CELL(0.080 ns) = 22.948 ns; Loc. = LCCOMB_X34_Y19_N28; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~29'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~27 Arkanoid:inst|Add14~29 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 23.109 ns Arkanoid:inst\|Add14~31 60 COMB LCCOMB_X34_Y19_N30 2 " "Info: 60: + IC(0.000 ns) + CELL(0.161 ns) = 23.109 ns; Loc. = LCCOMB_X34_Y19_N30; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~31'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.161 ns" { Arkanoid:inst|Add14~29 Arkanoid:inst|Add14~31 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.189 ns Arkanoid:inst\|Add14~33 61 COMB LCCOMB_X34_Y18_N0 2 " "Info: 61: + IC(0.000 ns) + CELL(0.080 ns) = 23.189 ns; Loc. = LCCOMB_X34_Y18_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~33'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~31 Arkanoid:inst|Add14~33 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.269 ns Arkanoid:inst\|Add14~35 62 COMB LCCOMB_X34_Y18_N2 2 " "Info: 62: + IC(0.000 ns) + CELL(0.080 ns) = 23.269 ns; Loc. = LCCOMB_X34_Y18_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~35'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~33 Arkanoid:inst|Add14~35 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.349 ns Arkanoid:inst\|Add14~37 63 COMB LCCOMB_X34_Y18_N4 2 " "Info: 63: + IC(0.000 ns) + CELL(0.080 ns) = 23.349 ns; Loc. = LCCOMB_X34_Y18_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~37'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~35 Arkanoid:inst|Add14~37 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.429 ns Arkanoid:inst\|Add14~39 64 COMB LCCOMB_X34_Y18_N6 2 " "Info: 64: + IC(0.000 ns) + CELL(0.080 ns) = 23.429 ns; Loc. = LCCOMB_X34_Y18_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~39'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~37 Arkanoid:inst|Add14~39 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.509 ns Arkanoid:inst\|Add14~41 65 COMB LCCOMB_X34_Y18_N8 2 " "Info: 65: + IC(0.000 ns) + CELL(0.080 ns) = 23.509 ns; Loc. = LCCOMB_X34_Y18_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~41'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~39 Arkanoid:inst|Add14~41 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.589 ns Arkanoid:inst\|Add14~43 66 COMB LCCOMB_X34_Y18_N10 2 " "Info: 66: + IC(0.000 ns) + CELL(0.080 ns) = 23.589 ns; Loc. = LCCOMB_X34_Y18_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~43'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~41 Arkanoid:inst|Add14~43 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.669 ns Arkanoid:inst\|Add14~45 67 COMB LCCOMB_X34_Y18_N12 2 " "Info: 67: + IC(0.000 ns) + CELL(0.080 ns) = 23.669 ns; Loc. = LCCOMB_X34_Y18_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~45'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~43 Arkanoid:inst|Add14~45 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 23.843 ns Arkanoid:inst\|Add14~47 68 COMB LCCOMB_X34_Y18_N14 2 " "Info: 68: + IC(0.000 ns) + CELL(0.174 ns) = 23.843 ns; Loc. = LCCOMB_X34_Y18_N14; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~47'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|Add14~45 Arkanoid:inst|Add14~47 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 23.923 ns Arkanoid:inst\|Add14~49 69 COMB LCCOMB_X34_Y18_N16 2 " "Info: 69: + IC(0.000 ns) + CELL(0.080 ns) = 23.923 ns; Loc. = LCCOMB_X34_Y18_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~49'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~47 Arkanoid:inst|Add14~49 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 24.003 ns Arkanoid:inst\|Add14~51 70 COMB LCCOMB_X34_Y18_N18 2 " "Info: 70: + IC(0.000 ns) + CELL(0.080 ns) = 24.003 ns; Loc. = LCCOMB_X34_Y18_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~51'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~49 Arkanoid:inst|Add14~51 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 24.083 ns Arkanoid:inst\|Add14~53 71 COMB LCCOMB_X34_Y18_N20 2 " "Info: 71: + IC(0.000 ns) + CELL(0.080 ns) = 24.083 ns; Loc. = LCCOMB_X34_Y18_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~53'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~51 Arkanoid:inst|Add14~53 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 24.163 ns Arkanoid:inst\|Add14~55 72 COMB LCCOMB_X34_Y18_N22 2 " "Info: 72: + IC(0.000 ns) + CELL(0.080 ns) = 24.163 ns; Loc. = LCCOMB_X34_Y18_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~55'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~53 Arkanoid:inst|Add14~55 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 24.243 ns Arkanoid:inst\|Add14~57 73 COMB LCCOMB_X34_Y18_N24 2 " "Info: 73: + IC(0.000 ns) + CELL(0.080 ns) = 24.243 ns; Loc. = LCCOMB_X34_Y18_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~57'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~55 Arkanoid:inst|Add14~57 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 24.323 ns Arkanoid:inst\|Add14~59 74 COMB LCCOMB_X34_Y18_N26 2 " "Info: 74: + IC(0.000 ns) + CELL(0.080 ns) = 24.323 ns; Loc. = LCCOMB_X34_Y18_N26; Fanout = 2; COMB Node = 'Arkanoid:inst\|Add14~59'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~57 Arkanoid:inst|Add14~59 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 24.403 ns Arkanoid:inst\|Add14~61 75 COMB LCCOMB_X34_Y18_N28 1 " "Info: 75: + IC(0.000 ns) + CELL(0.080 ns) = 24.403 ns; Loc. = LCCOMB_X34_Y18_N28; Fanout = 1; COMB Node = 'Arkanoid:inst\|Add14~61'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|Add14~59 Arkanoid:inst|Add14~61 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 24.861 ns Arkanoid:inst\|Add14~63 76 COMB LCCOMB_X34_Y18_N30 3 " "Info: 76: + IC(0.000 ns) + CELL(0.458 ns) = 24.861 ns; Loc. = LCCOMB_X34_Y18_N30; Fanout = 3; COMB Node = 'Arkanoid:inst\|Add14~63'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|Add14~61 Arkanoid:inst|Add14~63 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.950 ns) + CELL(0.178 ns) 25.989 ns Arkanoid:inst\|Add14~65 77 COMB LCCOMB_X35_Y22_N0 151 " "Info: 77: + IC(0.950 ns) + CELL(0.178 ns) = 25.989 ns; Loc. = LCCOMB_X35_Y22_N0; Fanout = 151; COMB Node = 'Arkanoid:inst\|Add14~65'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.128 ns" { Arkanoid:inst|Add14~63 Arkanoid:inst|Add14~65 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 226 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.012 ns) + CELL(0.517 ns) 27.518 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~4 78 COMB LCCOMB_X35_Y20_N4 2 " "Info: 78: + IC(1.012 ns) + CELL(0.517 ns) = 27.518 ns; Loc. = LCCOMB_X35_Y20_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~4'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.529 ns" { Arkanoid:inst|Add14~65 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~4 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 27.598 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~6 79 COMB LCCOMB_X35_Y20_N6 2 " "Info: 79: + IC(0.000 ns) + CELL(0.080 ns) = 27.598 ns; Loc. = LCCOMB_X35_Y20_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~6'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~4 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~6 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 27.678 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~8 80 COMB LCCOMB_X35_Y20_N8 2 " "Info: 80: + IC(0.000 ns) + CELL(0.080 ns) = 27.678 ns; Loc. = LCCOMB_X35_Y20_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~8'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~8 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 27.758 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~10 81 COMB LCCOMB_X35_Y20_N10 2 " "Info: 81: + IC(0.000 ns) + CELL(0.080 ns) = 27.758 ns; Loc. = LCCOMB_X35_Y20_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~8 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~10 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 27.838 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~12 82 COMB LCCOMB_X35_Y20_N12 2 " "Info: 82: + IC(0.000 ns) + CELL(0.080 ns) = 27.838 ns; Loc. = LCCOMB_X35_Y20_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~12'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~12 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 28.012 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~14 83 COMB LCCOMB_X35_Y20_N14 2 " "Info: 83: + IC(0.000 ns) + CELL(0.174 ns) = 28.012 ns; Loc. = LCCOMB_X35_Y20_N14; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~14'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~12 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~14 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.092 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~16 84 COMB LCCOMB_X35_Y20_N16 2 " "Info: 84: + IC(0.000 ns) + CELL(0.080 ns) = 28.092 ns; Loc. = LCCOMB_X35_Y20_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~16'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~14 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~16 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.172 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~18 85 COMB LCCOMB_X35_Y20_N18 2 " "Info: 85: + IC(0.000 ns) + CELL(0.080 ns) = 28.172 ns; Loc. = LCCOMB_X35_Y20_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~18'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~16 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~18 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.252 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~20 86 COMB LCCOMB_X35_Y20_N20 2 " "Info: 86: + IC(0.000 ns) + CELL(0.080 ns) = 28.252 ns; Loc. = LCCOMB_X35_Y20_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~20'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~18 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~20 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.332 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~22 87 COMB LCCOMB_X35_Y20_N22 2 " "Info: 87: + IC(0.000 ns) + CELL(0.080 ns) = 28.332 ns; Loc. = LCCOMB_X35_Y20_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~22'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~20 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~22 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.412 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~24 88 COMB LCCOMB_X35_Y20_N24 2 " "Info: 88: + IC(0.000 ns) + CELL(0.080 ns) = 28.412 ns; Loc. = LCCOMB_X35_Y20_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~24'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~22 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~24 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.492 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~26 89 COMB LCCOMB_X35_Y20_N26 2 " "Info: 89: + IC(0.000 ns) + CELL(0.080 ns) = 28.492 ns; Loc. = LCCOMB_X35_Y20_N26; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~26'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~24 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~26 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.572 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~28 90 COMB LCCOMB_X35_Y20_N28 2 " "Info: 90: + IC(0.000 ns) + CELL(0.080 ns) = 28.572 ns; Loc. = LCCOMB_X35_Y20_N28; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~28'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~26 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~28 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.161 ns) 28.733 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~30 91 COMB LCCOMB_X35_Y20_N30 2 " "Info: 91: + IC(0.000 ns) + CELL(0.161 ns) = 28.733 ns; Loc. = LCCOMB_X35_Y20_N30; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~30'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.161 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~28 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~30 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.813 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~32 92 COMB LCCOMB_X35_Y19_N0 2 " "Info: 92: + IC(0.000 ns) + CELL(0.080 ns) = 28.813 ns; Loc. = LCCOMB_X35_Y19_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~32'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~30 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~32 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.893 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~34 93 COMB LCCOMB_X35_Y19_N2 2 " "Info: 93: + IC(0.000 ns) + CELL(0.080 ns) = 28.893 ns; Loc. = LCCOMB_X35_Y19_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~34'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~32 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~34 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 28.973 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~36 94 COMB LCCOMB_X35_Y19_N4 2 " "Info: 94: + IC(0.000 ns) + CELL(0.080 ns) = 28.973 ns; Loc. = LCCOMB_X35_Y19_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~36'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~34 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~36 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.053 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~38 95 COMB LCCOMB_X35_Y19_N6 2 " "Info: 95: + IC(0.000 ns) + CELL(0.080 ns) = 29.053 ns; Loc. = LCCOMB_X35_Y19_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~38'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~36 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~38 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.133 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~40 96 COMB LCCOMB_X35_Y19_N8 2 " "Info: 96: + IC(0.000 ns) + CELL(0.080 ns) = 29.133 ns; Loc. = LCCOMB_X35_Y19_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~40'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~38 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~40 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.213 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~42 97 COMB LCCOMB_X35_Y19_N10 2 " "Info: 97: + IC(0.000 ns) + CELL(0.080 ns) = 29.213 ns; Loc. = LCCOMB_X35_Y19_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~42'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~40 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~42 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.293 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~44 98 COMB LCCOMB_X35_Y19_N12 2 " "Info: 98: + IC(0.000 ns) + CELL(0.080 ns) = 29.293 ns; Loc. = LCCOMB_X35_Y19_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~44'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~42 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~44 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 29.467 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~46 99 COMB LCCOMB_X35_Y19_N14 2 " "Info: 99: + IC(0.000 ns) + CELL(0.174 ns) = 29.467 ns; Loc. = LCCOMB_X35_Y19_N14; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~46'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~44 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~46 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.547 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~48 100 COMB LCCOMB_X35_Y19_N16 2 " "Info: 100: + IC(0.000 ns) + CELL(0.080 ns) = 29.547 ns; Loc. = LCCOMB_X35_Y19_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~48'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~46 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~48 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.627 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~50 101 COMB LCCOMB_X35_Y19_N18 2 " "Info: 101: + IC(0.000 ns) + CELL(0.080 ns) = 29.627 ns; Loc. = LCCOMB_X35_Y19_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~50'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~48 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~50 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.707 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~52 102 COMB LCCOMB_X35_Y19_N20 2 " "Info: 102: + IC(0.000 ns) + CELL(0.080 ns) = 29.707 ns; Loc. = LCCOMB_X35_Y19_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~52'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~50 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~52 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.787 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~54 103 COMB LCCOMB_X35_Y19_N22 2 " "Info: 103: + IC(0.000 ns) + CELL(0.080 ns) = 29.787 ns; Loc. = LCCOMB_X35_Y19_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~54'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~52 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~54 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 29.867 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~56 104 COMB LCCOMB_X35_Y19_N24 2 " "Info: 104: + IC(0.000 ns) + CELL(0.080 ns) = 29.867 ns; Loc. = LCCOMB_X35_Y19_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~56'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~54 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~56 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 30.325 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~57 105 COMB LCCOMB_X35_Y19_N26 4 " "Info: 105: + IC(0.000 ns) + CELL(0.458 ns) = 30.325 ns; Loc. = LCCOMB_X35_Y19_N26; Fanout = 4; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|lpm_abs_0s9:my_abs_num\|cs2a\[1\]~57'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~56 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~57 } "NODE_NAME" } } { "db/lpm_abs_0s9.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/lpm_abs_0s9.tdf" 31 6 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.186 ns) + CELL(0.517 ns) 32.028 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_3_result_int\[1\]~1 106 COMB LCCOMB_X38_Y21_N18 2 " "Info: 106: + IC(1.186 ns) + CELL(0.517 ns) = 32.028 ns; Loc. = LCCOMB_X38_Y21_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_3_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.703 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~57 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 141 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 32.108 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_3_result_int\[2\]~3 107 COMB LCCOMB_X38_Y21_N20 2 " "Info: 107: + IC(0.000 ns) + CELL(0.080 ns) = 32.108 ns; Loc. = LCCOMB_X38_Y21_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_3_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 141 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 32.188 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_3_result_int\[3\]~5 108 COMB LCCOMB_X38_Y21_N22 1 " "Info: 108: + IC(0.000 ns) + CELL(0.080 ns) = 32.188 ns; Loc. = LCCOMB_X38_Y21_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_3_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 141 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 32.646 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_3_result_int\[4\]~6 109 COMB LCCOMB_X38_Y21_N24 11 " "Info: 109: + IC(0.000 ns) + CELL(0.458 ns) = 32.646 ns; Loc. = LCCOMB_X38_Y21_N24; Fanout = 11; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_3_result_int\[4\]~6'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[4]~6 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 141 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.373 ns) + CELL(0.319 ns) 33.338 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[18\]~358 110 COMB LCCOMB_X38_Y21_N12 2 " "Info: 110: + IC(0.373 ns) + CELL(0.319 ns) = 33.338 ns; Loc. = LCCOMB_X38_Y21_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[18\]~358'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.692 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[4]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[18]~358 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.559 ns) + CELL(0.517 ns) 34.414 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[1\]~1 111 COMB LCCOMB_X39_Y21_N0 2 " "Info: 111: + IC(0.559 ns) + CELL(0.517 ns) = 34.414 ns; Loc. = LCCOMB_X39_Y21_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.076 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[18]~358 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 156 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 34.494 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[2\]~3 112 COMB LCCOMB_X39_Y21_N2 2 " "Info: 112: + IC(0.000 ns) + CELL(0.080 ns) = 34.494 ns; Loc. = LCCOMB_X39_Y21_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 156 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 34.574 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[3\]~5 113 COMB LCCOMB_X39_Y21_N4 2 " "Info: 113: + IC(0.000 ns) + CELL(0.080 ns) = 34.574 ns; Loc. = LCCOMB_X39_Y21_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 156 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 34.654 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[4\]~7 114 COMB LCCOMB_X39_Y21_N6 1 " "Info: 114: + IC(0.000 ns) + CELL(0.080 ns) = 34.654 ns; Loc. = LCCOMB_X39_Y21_N6; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 156 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 35.112 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[5\]~8 115 COMB LCCOMB_X39_Y21_N8 13 " "Info: 115: + IC(0.000 ns) + CELL(0.458 ns) = 35.112 ns; Loc. = LCCOMB_X39_Y21_N8; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_4_result_int\[5\]~8'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[5]~8 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 156 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.235 ns) + CELL(0.178 ns) 36.525 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[24\]~365 116 COMB LCCOMB_X42_Y19_N8 2 " "Info: 116: + IC(1.235 ns) + CELL(0.178 ns) = 36.525 ns; Loc. = LCCOMB_X42_Y19_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[24\]~365'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.413 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[5]~8 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[24]~365 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.187 ns) + CELL(0.517 ns) 38.229 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[1\]~1 117 COMB LCCOMB_X39_Y21_N18 2 " "Info: 117: + IC(1.187 ns) + CELL(0.517 ns) = 38.229 ns; Loc. = LCCOMB_X39_Y21_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.704 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[24]~365 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 161 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 38.309 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[2\]~3 118 COMB LCCOMB_X39_Y21_N20 2 " "Info: 118: + IC(0.000 ns) + CELL(0.080 ns) = 38.309 ns; Loc. = LCCOMB_X39_Y21_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 161 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 38.389 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[3\]~5 119 COMB LCCOMB_X39_Y21_N22 2 " "Info: 119: + IC(0.000 ns) + CELL(0.080 ns) = 38.389 ns; Loc. = LCCOMB_X39_Y21_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 161 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 38.469 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[4\]~7 120 COMB LCCOMB_X39_Y21_N24 1 " "Info: 120: + IC(0.000 ns) + CELL(0.080 ns) = 38.469 ns; Loc. = LCCOMB_X39_Y21_N24; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 161 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 38.549 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[5\]~9 121 COMB LCCOMB_X39_Y21_N26 1 " "Info: 121: + IC(0.000 ns) + CELL(0.080 ns) = 38.549 ns; Loc. = LCCOMB_X39_Y21_N26; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 161 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 39.007 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[6\]~10 122 COMB LCCOMB_X39_Y21_N28 13 " "Info: 122: + IC(0.000 ns) + CELL(0.458 ns) = 39.007 ns; Loc. = LCCOMB_X39_Y21_N28; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_5_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 161 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.249 ns) + CELL(0.322 ns) 40.578 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[32\]~369 123 COMB LCCOMB_X42_Y19_N0 2 " "Info: 123: + IC(1.249 ns) + CELL(0.322 ns) = 40.578 ns; Loc. = LCCOMB_X42_Y19_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[32\]~369'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.571 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[32]~369 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.544 ns) + CELL(0.517 ns) 41.639 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_6_result_int\[3\]~5 124 COMB LCCOMB_X43_Y19_N24 2 " "Info: 124: + IC(0.544 ns) + CELL(0.517 ns) = 41.639 ns; Loc. = LCCOMB_X43_Y19_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_6_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.061 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[32]~369 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 166 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 41.719 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_6_result_int\[4\]~7 125 COMB LCCOMB_X43_Y19_N26 1 " "Info: 125: + IC(0.000 ns) + CELL(0.080 ns) = 41.719 ns; Loc. = LCCOMB_X43_Y19_N26; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_6_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 166 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 41.799 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_6_result_int\[5\]~9 126 COMB LCCOMB_X43_Y19_N28 1 " "Info: 126: + IC(0.000 ns) + CELL(0.080 ns) = 41.799 ns; Loc. = LCCOMB_X43_Y19_N28; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_6_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 166 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 42.257 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_6_result_int\[6\]~10 127 COMB LCCOMB_X43_Y19_N30 13 " "Info: 127: + IC(0.000 ns) + CELL(0.458 ns) = 42.257 ns; Loc. = LCCOMB_X43_Y19_N30; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_6_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 166 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.502 ns) + CELL(0.322 ns) 43.081 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[36\]~380 128 COMB LCCOMB_X44_Y19_N2 2 " "Info: 128: + IC(0.502 ns) + CELL(0.322 ns) = 43.081 ns; Loc. = LCCOMB_X44_Y19_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[36\]~380'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.824 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[36]~380 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.535 ns) + CELL(0.517 ns) 44.133 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[1\]~1 129 COMB LCCOMB_X43_Y19_N0 2 " "Info: 129: + IC(0.535 ns) + CELL(0.517 ns) = 44.133 ns; Loc. = LCCOMB_X43_Y19_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.052 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[36]~380 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 171 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 44.213 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[2\]~3 130 COMB LCCOMB_X43_Y19_N2 2 " "Info: 130: + IC(0.000 ns) + CELL(0.080 ns) = 44.213 ns; Loc. = LCCOMB_X43_Y19_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 171 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 44.293 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[3\]~5 131 COMB LCCOMB_X43_Y19_N4 2 " "Info: 131: + IC(0.000 ns) + CELL(0.080 ns) = 44.293 ns; Loc. = LCCOMB_X43_Y19_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 171 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 44.373 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[4\]~7 132 COMB LCCOMB_X43_Y19_N6 1 " "Info: 132: + IC(0.000 ns) + CELL(0.080 ns) = 44.373 ns; Loc. = LCCOMB_X43_Y19_N6; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 171 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 44.453 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[5\]~9 133 COMB LCCOMB_X43_Y19_N8 1 " "Info: 133: + IC(0.000 ns) + CELL(0.080 ns) = 44.453 ns; Loc. = LCCOMB_X43_Y19_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 171 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 44.911 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[6\]~10 134 COMB LCCOMB_X43_Y19_N10 13 " "Info: 134: + IC(0.000 ns) + CELL(0.458 ns) = 44.911 ns; Loc. = LCCOMB_X43_Y19_N10; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_7_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 171 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.562 ns) + CELL(0.322 ns) 45.795 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[44\]~615 135 COMB LCCOMB_X42_Y19_N22 3 " "Info: 135: + IC(0.562 ns) + CELL(0.322 ns) = 45.795 ns; Loc. = LCCOMB_X42_Y19_N22; Fanout = 3; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[44\]~615'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.884 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[44]~615 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.148 ns) + CELL(0.495 ns) 47.438 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_8_result_int\[3\]~5 136 COMB LCCOMB_X44_Y17_N4 2 " "Info: 136: + IC(1.148 ns) + CELL(0.495 ns) = 47.438 ns; Loc. = LCCOMB_X44_Y17_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_8_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.643 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[44]~615 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 176 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 47.518 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_8_result_int\[4\]~7 137 COMB LCCOMB_X44_Y17_N6 1 " "Info: 137: + IC(0.000 ns) + CELL(0.080 ns) = 47.518 ns; Loc. = LCCOMB_X44_Y17_N6; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_8_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 176 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 47.598 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_8_result_int\[5\]~9 138 COMB LCCOMB_X44_Y17_N8 1 " "Info: 138: + IC(0.000 ns) + CELL(0.080 ns) = 47.598 ns; Loc. = LCCOMB_X44_Y17_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_8_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 176 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 48.056 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_8_result_int\[6\]~10 139 COMB LCCOMB_X44_Y17_N10 13 " "Info: 139: + IC(0.000 ns) + CELL(0.458 ns) = 48.056 ns; Loc. = LCCOMB_X44_Y17_N10; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_8_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 176 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.886 ns) + CELL(0.178 ns) 49.120 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[50\]~616 140 COMB LCCOMB_X44_Y19_N28 3 " "Info: 140: + IC(0.886 ns) + CELL(0.178 ns) = 49.120 ns; Loc. = LCCOMB_X44_Y19_N28; Fanout = 3; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[50\]~616'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.064 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[50]~616 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.168 ns) + CELL(0.517 ns) 50.805 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_9_result_int\[3\]~5 141 COMB LCCOMB_X44_Y17_N18 2 " "Info: 141: + IC(1.168 ns) + CELL(0.517 ns) = 50.805 ns; Loc. = LCCOMB_X44_Y17_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_9_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.685 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[50]~616 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 181 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 50.885 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_9_result_int\[4\]~7 142 COMB LCCOMB_X44_Y17_N20 1 " "Info: 142: + IC(0.000 ns) + CELL(0.080 ns) = 50.885 ns; Loc. = LCCOMB_X44_Y17_N20; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_9_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 181 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 50.965 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_9_result_int\[5\]~9 143 COMB LCCOMB_X44_Y17_N22 1 " "Info: 143: + IC(0.000 ns) + CELL(0.080 ns) = 50.965 ns; Loc. = LCCOMB_X44_Y17_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_9_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 181 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 51.423 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_9_result_int\[6\]~10 144 COMB LCCOMB_X44_Y17_N24 13 " "Info: 144: + IC(0.000 ns) + CELL(0.458 ns) = 51.423 ns; Loc. = LCCOMB_X44_Y17_N24; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_9_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 181 22 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.889 ns) + CELL(0.322 ns) 52.634 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[56\]~617 145 COMB LCCOMB_X44_Y19_N22 3 " "Info: 145: + IC(0.889 ns) + CELL(0.322 ns) = 52.634 ns; Loc. = LCCOMB_X44_Y19_N22; Fanout = 3; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[56\]~617'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.211 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[56]~617 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.198 ns) + CELL(0.517 ns) 54.349 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_10_result_int\[3\]~5 146 COMB LCCOMB_X42_Y17_N22 2 " "Info: 146: + IC(1.198 ns) + CELL(0.517 ns) = 54.349 ns; Loc. = LCCOMB_X42_Y17_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_10_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.715 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[56]~617 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 54.429 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_10_result_int\[4\]~7 147 COMB LCCOMB_X42_Y17_N24 1 " "Info: 147: + IC(0.000 ns) + CELL(0.080 ns) = 54.429 ns; Loc. = LCCOMB_X42_Y17_N24; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_10_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 54.509 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_10_result_int\[5\]~9 148 COMB LCCOMB_X42_Y17_N26 1 " "Info: 148: + IC(0.000 ns) + CELL(0.080 ns) = 54.509 ns; Loc. = LCCOMB_X42_Y17_N26; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_10_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 54.967 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_10_result_int\[6\]~10 149 COMB LCCOMB_X42_Y17_N28 13 " "Info: 149: + IC(0.000 ns) + CELL(0.458 ns) = 54.967 ns; Loc. = LCCOMB_X42_Y17_N28; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_10_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 36 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.871 ns) + CELL(0.178 ns) 56.016 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[60\]~407 150 COMB LCCOMB_X40_Y17_N24 2 " "Info: 150: + IC(0.871 ns) + CELL(0.178 ns) = 56.016 ns; Loc. = LCCOMB_X40_Y17_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[60\]~407'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.049 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[60]~407 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.854 ns) + CELL(0.517 ns) 57.387 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[1\]~1 151 COMB LCCOMB_X42_Y17_N2 2 " "Info: 151: + IC(0.854 ns) + CELL(0.517 ns) = 57.387 ns; Loc. = LCCOMB_X42_Y17_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.371 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[60]~407 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 57.467 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[2\]~3 152 COMB LCCOMB_X42_Y17_N4 2 " "Info: 152: + IC(0.000 ns) + CELL(0.080 ns) = 57.467 ns; Loc. = LCCOMB_X42_Y17_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 57.547 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[3\]~5 153 COMB LCCOMB_X42_Y17_N6 2 " "Info: 153: + IC(0.000 ns) + CELL(0.080 ns) = 57.547 ns; Loc. = LCCOMB_X42_Y17_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 57.627 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[4\]~7 154 COMB LCCOMB_X42_Y17_N8 1 " "Info: 154: + IC(0.000 ns) + CELL(0.080 ns) = 57.627 ns; Loc. = LCCOMB_X42_Y17_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 57.707 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[5\]~9 155 COMB LCCOMB_X42_Y17_N10 1 " "Info: 155: + IC(0.000 ns) + CELL(0.080 ns) = 57.707 ns; Loc. = LCCOMB_X42_Y17_N10; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 58.165 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[6\]~10 156 COMB LCCOMB_X42_Y17_N12 13 " "Info: 156: + IC(0.000 ns) + CELL(0.458 ns) = 58.165 ns; Loc. = LCCOMB_X42_Y17_N12; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_11_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 41 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.893 ns) + CELL(0.177 ns) 59.235 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[66\]~415 157 COMB LCCOMB_X40_Y17_N16 2 " "Info: 157: + IC(0.893 ns) + CELL(0.177 ns) = 59.235 ns; Loc. = LCCOMB_X40_Y17_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[66\]~415'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.070 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[66]~415 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.552 ns) + CELL(0.517 ns) 60.304 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[1\]~1 158 COMB LCCOMB_X39_Y17_N6 2 " "Info: 158: + IC(0.552 ns) + CELL(0.517 ns) = 60.304 ns; Loc. = LCCOMB_X39_Y17_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.069 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[66]~415 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 60.384 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[2\]~3 159 COMB LCCOMB_X39_Y17_N8 2 " "Info: 159: + IC(0.000 ns) + CELL(0.080 ns) = 60.384 ns; Loc. = LCCOMB_X39_Y17_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 60.464 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[3\]~5 160 COMB LCCOMB_X39_Y17_N10 2 " "Info: 160: + IC(0.000 ns) + CELL(0.080 ns) = 60.464 ns; Loc. = LCCOMB_X39_Y17_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 60.544 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[4\]~7 161 COMB LCCOMB_X39_Y17_N12 1 " "Info: 161: + IC(0.000 ns) + CELL(0.080 ns) = 60.544 ns; Loc. = LCCOMB_X39_Y17_N12; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 60.718 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[5\]~9 162 COMB LCCOMB_X39_Y17_N14 1 " "Info: 162: + IC(0.000 ns) + CELL(0.174 ns) = 60.718 ns; Loc. = LCCOMB_X39_Y17_N14; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 61.176 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[6\]~10 163 COMB LCCOMB_X39_Y17_N16 13 " "Info: 163: + IC(0.000 ns) + CELL(0.458 ns) = 61.176 ns; Loc. = LCCOMB_X39_Y17_N16; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_12_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 46 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.177 ns) 62.248 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[72\]~422 164 COMB LCCOMB_X40_Y19_N8 2 " "Info: 164: + IC(0.895 ns) + CELL(0.177 ns) = 62.248 ns; Loc. = LCCOMB_X40_Y19_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[72\]~422'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.072 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[72]~422 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.866 ns) + CELL(0.495 ns) 63.609 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_13_result_int\[1\]~1 165 COMB LCCOMB_X39_Y17_N18 2 " "Info: 165: + IC(0.866 ns) + CELL(0.495 ns) = 63.609 ns; Loc. = LCCOMB_X39_Y17_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_13_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.361 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[72]~422 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 63.689 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_13_result_int\[2\]~3 166 COMB LCCOMB_X39_Y17_N20 2 " "Info: 166: + IC(0.000 ns) + CELL(0.080 ns) = 63.689 ns; Loc. = LCCOMB_X39_Y17_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_13_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 63.769 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_13_result_int\[3\]~5 167 COMB LCCOMB_X39_Y17_N22 2 " "Info: 167: + IC(0.000 ns) + CELL(0.080 ns) = 63.769 ns; Loc. = LCCOMB_X39_Y17_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_13_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 64.227 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_13_result_int\[4\]~6 168 COMB LCCOMB_X39_Y17_N24 1 " "Info: 168: + IC(0.000 ns) + CELL(0.458 ns) = 64.227 ns; Loc. = LCCOMB_X39_Y17_N24; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_13_result_int\[4\]~6'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[4]~6 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 51 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.537 ns) + CELL(0.521 ns) 65.285 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[82\]~423 169 COMB LCCOMB_X40_Y17_N22 1 " "Info: 169: + IC(0.537 ns) + CELL(0.521 ns) = 65.285 ns; Loc. = LCCOMB_X40_Y17_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[82\]~423'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.058 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[4]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[82]~423 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.812 ns) + CELL(0.517 ns) 66.614 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_14_result_int\[5\]~9 170 COMB LCCOMB_X38_Y17_N10 1 " "Info: 170: + IC(0.812 ns) + CELL(0.517 ns) = 66.614 ns; Loc. = LCCOMB_X38_Y17_N10; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_14_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.329 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[82]~423 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 67.072 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_14_result_int\[6\]~10 171 COMB LCCOMB_X38_Y17_N12 13 " "Info: 171: + IC(0.000 ns) + CELL(0.458 ns) = 67.072 ns; Loc. = LCCOMB_X38_Y17_N12; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_14_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 56 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.941 ns) + CELL(0.178 ns) 68.191 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[84\]~435 172 COMB LCCOMB_X38_Y16_N20 2 " "Info: 172: + IC(0.941 ns) + CELL(0.178 ns) = 68.191 ns; Loc. = LCCOMB_X38_Y16_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[84\]~435'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.119 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[84]~435 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.333 ns) + CELL(0.517 ns) 69.041 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[1\]~1 173 COMB LCCOMB_X38_Y16_N6 2 " "Info: 173: + IC(0.333 ns) + CELL(0.517 ns) = 69.041 ns; Loc. = LCCOMB_X38_Y16_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.850 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[84]~435 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 69.121 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[2\]~3 174 COMB LCCOMB_X38_Y16_N8 2 " "Info: 174: + IC(0.000 ns) + CELL(0.080 ns) = 69.121 ns; Loc. = LCCOMB_X38_Y16_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 69.201 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[3\]~5 175 COMB LCCOMB_X38_Y16_N10 2 " "Info: 175: + IC(0.000 ns) + CELL(0.080 ns) = 69.201 ns; Loc. = LCCOMB_X38_Y16_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 69.281 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[4\]~7 176 COMB LCCOMB_X38_Y16_N12 1 " "Info: 176: + IC(0.000 ns) + CELL(0.080 ns) = 69.281 ns; Loc. = LCCOMB_X38_Y16_N12; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 69.455 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[5\]~9 177 COMB LCCOMB_X38_Y16_N14 1 " "Info: 177: + IC(0.000 ns) + CELL(0.174 ns) = 69.455 ns; Loc. = LCCOMB_X38_Y16_N14; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 69.913 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[6\]~10 178 COMB LCCOMB_X38_Y16_N16 13 " "Info: 178: + IC(0.000 ns) + CELL(0.458 ns) = 69.913 ns; Loc. = LCCOMB_X38_Y16_N16; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_15_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 61 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.628 ns) + CELL(0.322 ns) 70.863 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[92\]~623 179 COMB LCCOMB_X37_Y16_N22 3 " "Info: 179: + IC(0.628 ns) + CELL(0.322 ns) = 70.863 ns; Loc. = LCCOMB_X37_Y16_N22; Fanout = 3; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[92\]~623'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.950 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[92]~623 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.552 ns) + CELL(0.517 ns) 71.932 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_16_result_int\[3\]~5 180 COMB LCCOMB_X37_Y16_N4 2 " "Info: 180: + IC(0.552 ns) + CELL(0.517 ns) = 71.932 ns; Loc. = LCCOMB_X37_Y16_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_16_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.069 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[92]~623 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 72.012 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_16_result_int\[4\]~7 181 COMB LCCOMB_X37_Y16_N6 1 " "Info: 181: + IC(0.000 ns) + CELL(0.080 ns) = 72.012 ns; Loc. = LCCOMB_X37_Y16_N6; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_16_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 72.092 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_16_result_int\[5\]~9 182 COMB LCCOMB_X37_Y16_N8 1 " "Info: 182: + IC(0.000 ns) + CELL(0.080 ns) = 72.092 ns; Loc. = LCCOMB_X37_Y16_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_16_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 72.550 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_16_result_int\[6\]~10 183 COMB LCCOMB_X37_Y16_N10 13 " "Info: 183: + IC(0.000 ns) + CELL(0.458 ns) = 72.550 ns; Loc. = LCCOMB_X37_Y16_N10; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_16_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 66 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.613 ns) + CELL(0.319 ns) 73.482 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[97\]~447 184 COMB LCCOMB_X36_Y16_N26 2 " "Info: 184: + IC(0.613 ns) + CELL(0.319 ns) = 73.482 ns; Loc. = LCCOMB_X36_Y16_N26; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[97\]~447'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.932 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[97]~447 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.540 ns) + CELL(0.517 ns) 74.539 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[2\]~3 185 COMB LCCOMB_X36_Y16_N8 2 " "Info: 185: + IC(0.540 ns) + CELL(0.517 ns) = 74.539 ns; Loc. = LCCOMB_X36_Y16_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.057 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[97]~447 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 74.619 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[3\]~5 186 COMB LCCOMB_X36_Y16_N10 2 " "Info: 186: + IC(0.000 ns) + CELL(0.080 ns) = 74.619 ns; Loc. = LCCOMB_X36_Y16_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 74.699 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[4\]~7 187 COMB LCCOMB_X36_Y16_N12 1 " "Info: 187: + IC(0.000 ns) + CELL(0.080 ns) = 74.699 ns; Loc. = LCCOMB_X36_Y16_N12; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 74.873 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[5\]~9 188 COMB LCCOMB_X36_Y16_N14 1 " "Info: 188: + IC(0.000 ns) + CELL(0.174 ns) = 74.873 ns; Loc. = LCCOMB_X36_Y16_N14; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 75.331 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[6\]~10 189 COMB LCCOMB_X36_Y16_N16 13 " "Info: 189: + IC(0.000 ns) + CELL(0.458 ns) = 75.331 ns; Loc. = LCCOMB_X36_Y16_N16; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_17_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 71 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.611 ns) + CELL(0.322 ns) 76.264 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[102\]~457 190 COMB LCCOMB_X35_Y16_N6 2 " "Info: 190: + IC(0.611 ns) + CELL(0.322 ns) = 76.264 ns; Loc. = LCCOMB_X35_Y16_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[102\]~457'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.933 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[102]~457 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.324 ns) + CELL(0.517 ns) 77.105 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[1\]~1 191 COMB LCCOMB_X35_Y16_N16 2 " "Info: 191: + IC(0.324 ns) + CELL(0.517 ns) = 77.105 ns; Loc. = LCCOMB_X35_Y16_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.841 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[102]~457 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 76 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 77.185 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[2\]~3 192 COMB LCCOMB_X35_Y16_N18 2 " "Info: 192: + IC(0.000 ns) + CELL(0.080 ns) = 77.185 ns; Loc. = LCCOMB_X35_Y16_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 76 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 77.265 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[3\]~5 193 COMB LCCOMB_X35_Y16_N20 2 " "Info: 193: + IC(0.000 ns) + CELL(0.080 ns) = 77.265 ns; Loc. = LCCOMB_X35_Y16_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 76 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 77.345 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[4\]~7 194 COMB LCCOMB_X35_Y16_N22 1 " "Info: 194: + IC(0.000 ns) + CELL(0.080 ns) = 77.345 ns; Loc. = LCCOMB_X35_Y16_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 76 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 77.425 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[5\]~9 195 COMB LCCOMB_X35_Y16_N24 1 " "Info: 195: + IC(0.000 ns) + CELL(0.080 ns) = 77.425 ns; Loc. = LCCOMB_X35_Y16_N24; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 76 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 77.883 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[6\]~10 196 COMB LCCOMB_X35_Y16_N26 13 " "Info: 196: + IC(0.000 ns) + CELL(0.458 ns) = 77.883 ns; Loc. = LCCOMB_X35_Y16_N26; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_18_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 76 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.134 ns) + CELL(0.322 ns) 79.339 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[108\]~464 197 COMB LCCOMB_X27_Y16_N18 2 " "Info: 197: + IC(1.134 ns) + CELL(0.322 ns) = 79.339 ns; Loc. = LCCOMB_X27_Y16_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[108\]~464'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.456 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[108]~464 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.809 ns) + CELL(0.517 ns) 80.665 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[1\]~1 198 COMB LCCOMB_X26_Y16_N12 2 " "Info: 198: + IC(0.809 ns) + CELL(0.517 ns) = 80.665 ns; Loc. = LCCOMB_X26_Y16_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.326 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[108]~464 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 80.839 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[2\]~3 199 COMB LCCOMB_X26_Y16_N14 2 " "Info: 199: + IC(0.000 ns) + CELL(0.174 ns) = 80.839 ns; Loc. = LCCOMB_X26_Y16_N14; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 80.919 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[3\]~5 200 COMB LCCOMB_X26_Y16_N16 2 " "Info: 200: + IC(0.000 ns) + CELL(0.080 ns) = 80.919 ns; Loc. = LCCOMB_X26_Y16_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 80.999 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[4\]~7 201 COMB LCCOMB_X26_Y16_N18 1 " "Info: 201: + IC(0.000 ns) + CELL(0.080 ns) = 80.999 ns; Loc. = LCCOMB_X26_Y16_N18; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 81.079 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[5\]~9 202 COMB LCCOMB_X26_Y16_N20 1 " "Info: 202: + IC(0.000 ns) + CELL(0.080 ns) = 81.079 ns; Loc. = LCCOMB_X26_Y16_N20; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 81.537 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[6\]~10 203 COMB LCCOMB_X26_Y16_N22 13 " "Info: 203: + IC(0.000 ns) + CELL(0.458 ns) = 81.537 ns; Loc. = LCCOMB_X26_Y16_N22; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_19_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 81 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.409 ns) + CELL(0.178 ns) 83.124 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[116\]~627 204 COMB LCCOMB_X35_Y16_N30 3 " "Info: 204: + IC(1.409 ns) + CELL(0.178 ns) = 83.124 ns; Loc. = LCCOMB_X35_Y16_N30; Fanout = 3; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[116\]~627'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.587 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[116]~627 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.417 ns) + CELL(0.517 ns) 85.058 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_20_result_int\[3\]~5 205 COMB LCCOMB_X26_Y16_N4 2 " "Info: 205: + IC(1.417 ns) + CELL(0.517 ns) = 85.058 ns; Loc. = LCCOMB_X26_Y16_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_20_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.934 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[116]~627 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 91 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 85.138 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_20_result_int\[4\]~7 206 COMB LCCOMB_X26_Y16_N6 1 " "Info: 206: + IC(0.000 ns) + CELL(0.080 ns) = 85.138 ns; Loc. = LCCOMB_X26_Y16_N6; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_20_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 91 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 85.218 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_20_result_int\[5\]~9 207 COMB LCCOMB_X26_Y16_N8 1 " "Info: 207: + IC(0.000 ns) + CELL(0.080 ns) = 85.218 ns; Loc. = LCCOMB_X26_Y16_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_20_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 91 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 85.676 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_20_result_int\[6\]~10 208 COMB LCCOMB_X26_Y16_N10 13 " "Info: 208: + IC(0.000 ns) + CELL(0.458 ns) = 85.676 ns; Loc. = LCCOMB_X26_Y16_N10; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_20_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 91 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.578 ns) + CELL(0.177 ns) 86.431 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[122\]~474 209 COMB LCCOMB_X27_Y16_N8 2 " "Info: 209: + IC(0.578 ns) + CELL(0.177 ns) = 86.431 ns; Loc. = LCCOMB_X27_Y16_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[122\]~474'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.755 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[122]~474 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.476 ns) + CELL(0.517 ns) 88.424 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_21_result_int\[3\]~5 210 COMB LCCOMB_X21_Y12_N24 2 " "Info: 210: + IC(1.476 ns) + CELL(0.517 ns) = 88.424 ns; Loc. = LCCOMB_X21_Y12_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_21_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.993 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[122]~474 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 96 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 88.504 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_21_result_int\[4\]~7 211 COMB LCCOMB_X21_Y12_N26 1 " "Info: 211: + IC(0.000 ns) + CELL(0.080 ns) = 88.504 ns; Loc. = LCCOMB_X21_Y12_N26; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_21_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 96 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 88.584 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_21_result_int\[5\]~9 212 COMB LCCOMB_X21_Y12_N28 1 " "Info: 212: + IC(0.000 ns) + CELL(0.080 ns) = 88.584 ns; Loc. = LCCOMB_X21_Y12_N28; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_21_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 96 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 89.042 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_21_result_int\[6\]~10 213 COMB LCCOMB_X21_Y12_N30 13 " "Info: 213: + IC(0.000 ns) + CELL(0.458 ns) = 89.042 ns; Loc. = LCCOMB_X21_Y12_N30; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_21_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 96 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.569 ns) + CELL(0.319 ns) 89.930 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[126\]~484 214 COMB LCCOMB_X22_Y12_N12 2 " "Info: 214: + IC(0.569 ns) + CELL(0.319 ns) = 89.930 ns; Loc. = LCCOMB_X22_Y12_N12; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[126\]~484'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.888 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[126]~484 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.820 ns) + CELL(0.517 ns) 91.267 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[1\]~1 215 COMB LCCOMB_X21_Y12_N6 2 " "Info: 215: + IC(0.820 ns) + CELL(0.517 ns) = 91.267 ns; Loc. = LCCOMB_X21_Y12_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.337 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[126]~484 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 101 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 91.347 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[2\]~3 216 COMB LCCOMB_X21_Y12_N8 2 " "Info: 216: + IC(0.000 ns) + CELL(0.080 ns) = 91.347 ns; Loc. = LCCOMB_X21_Y12_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 101 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 91.427 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[3\]~5 217 COMB LCCOMB_X21_Y12_N10 2 " "Info: 217: + IC(0.000 ns) + CELL(0.080 ns) = 91.427 ns; Loc. = LCCOMB_X21_Y12_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 101 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 91.507 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[4\]~7 218 COMB LCCOMB_X21_Y12_N12 1 " "Info: 218: + IC(0.000 ns) + CELL(0.080 ns) = 91.507 ns; Loc. = LCCOMB_X21_Y12_N12; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 101 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 91.681 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[5\]~9 219 COMB LCCOMB_X21_Y12_N14 1 " "Info: 219: + IC(0.000 ns) + CELL(0.174 ns) = 91.681 ns; Loc. = LCCOMB_X21_Y12_N14; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 101 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 92.139 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[6\]~10 220 COMB LCCOMB_X21_Y12_N16 13 " "Info: 220: + IC(0.000 ns) + CELL(0.458 ns) = 92.139 ns; Loc. = LCCOMB_X21_Y12_N16; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_22_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 101 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(0.322 ns) 93.361 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[132\]~492 221 COMB LCCOMB_X20_Y11_N2 2 " "Info: 221: + IC(0.900 ns) + CELL(0.322 ns) = 93.361 ns; Loc. = LCCOMB_X20_Y11_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[132\]~492'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.222 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[132]~492 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.548 ns) + CELL(0.517 ns) 94.426 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[1\]~1 222 COMB LCCOMB_X21_Y11_N6 2 " "Info: 222: + IC(0.548 ns) + CELL(0.517 ns) = 94.426 ns; Loc. = LCCOMB_X21_Y11_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.065 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[132]~492 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 106 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 94.506 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[2\]~3 223 COMB LCCOMB_X21_Y11_N8 2 " "Info: 223: + IC(0.000 ns) + CELL(0.080 ns) = 94.506 ns; Loc. = LCCOMB_X21_Y11_N8; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 106 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 94.586 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[3\]~5 224 COMB LCCOMB_X21_Y11_N10 2 " "Info: 224: + IC(0.000 ns) + CELL(0.080 ns) = 94.586 ns; Loc. = LCCOMB_X21_Y11_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 106 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 94.666 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[4\]~7 225 COMB LCCOMB_X21_Y11_N12 1 " "Info: 225: + IC(0.000 ns) + CELL(0.080 ns) = 94.666 ns; Loc. = LCCOMB_X21_Y11_N12; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 106 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.174 ns) 94.840 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[5\]~9 226 COMB LCCOMB_X21_Y11_N14 1 " "Info: 226: + IC(0.000 ns) + CELL(0.174 ns) = 94.840 ns; Loc. = LCCOMB_X21_Y11_N14; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.174 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 106 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 95.298 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[6\]~10 227 COMB LCCOMB_X21_Y11_N16 13 " "Info: 227: + IC(0.000 ns) + CELL(0.458 ns) = 95.298 ns; Loc. = LCCOMB_X21_Y11_N16; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_23_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 106 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.622 ns) + CELL(0.322 ns) 96.242 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[138\]~498 228 COMB LCCOMB_X20_Y11_N28 2 " "Info: 228: + IC(0.622 ns) + CELL(0.322 ns) = 96.242 ns; Loc. = LCCOMB_X20_Y11_N28; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[138\]~498'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.944 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[138]~498 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.526 ns) + CELL(0.495 ns) 97.263 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[1\]~1 229 COMB LCCOMB_X21_Y11_N20 2 " "Info: 229: + IC(0.526 ns) + CELL(0.495 ns) = 97.263 ns; Loc. = LCCOMB_X21_Y11_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.021 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[138]~498 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 111 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 97.343 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[2\]~3 230 COMB LCCOMB_X21_Y11_N22 2 " "Info: 230: + IC(0.000 ns) + CELL(0.080 ns) = 97.343 ns; Loc. = LCCOMB_X21_Y11_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 111 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 97.423 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[3\]~5 231 COMB LCCOMB_X21_Y11_N24 2 " "Info: 231: + IC(0.000 ns) + CELL(0.080 ns) = 97.423 ns; Loc. = LCCOMB_X21_Y11_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 111 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 97.503 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[4\]~7 232 COMB LCCOMB_X21_Y11_N26 1 " "Info: 232: + IC(0.000 ns) + CELL(0.080 ns) = 97.503 ns; Loc. = LCCOMB_X21_Y11_N26; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 111 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 97.583 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[5\]~9 233 COMB LCCOMB_X21_Y11_N28 1 " "Info: 233: + IC(0.000 ns) + CELL(0.080 ns) = 97.583 ns; Loc. = LCCOMB_X21_Y11_N28; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 111 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 98.041 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[6\]~10 234 COMB LCCOMB_X21_Y11_N30 13 " "Info: 234: + IC(0.000 ns) + CELL(0.458 ns) = 98.041 ns; Loc. = LCCOMB_X21_Y11_N30; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_24_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 111 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.833 ns) + CELL(0.177 ns) 99.051 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[146\]~502 235 COMB LCCOMB_X20_Y11_N0 2 " "Info: 235: + IC(0.833 ns) + CELL(0.177 ns) = 99.051 ns; Loc. = LCCOMB_X20_Y11_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[146\]~502'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.010 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[146]~502 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.622 ns) + CELL(0.517 ns) 101.190 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_25_result_int\[3\]~5 236 COMB LCCOMB_X20_Y20_N6 2 " "Info: 236: + IC(1.622 ns) + CELL(0.517 ns) = 101.190 ns; Loc. = LCCOMB_X20_Y20_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_25_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "2.139 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[146]~502 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 116 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 101.270 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_25_result_int\[4\]~7 237 COMB LCCOMB_X20_Y20_N8 1 " "Info: 237: + IC(0.000 ns) + CELL(0.080 ns) = 101.270 ns; Loc. = LCCOMB_X20_Y20_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_25_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 116 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 101.350 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_25_result_int\[5\]~9 238 COMB LCCOMB_X20_Y20_N10 1 " "Info: 238: + IC(0.000 ns) + CELL(0.080 ns) = 101.350 ns; Loc. = LCCOMB_X20_Y20_N10; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_25_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 116 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 101.808 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_25_result_int\[6\]~10 239 COMB LCCOMB_X20_Y20_N12 13 " "Info: 239: + IC(0.000 ns) + CELL(0.458 ns) = 101.808 ns; Loc. = LCCOMB_X20_Y20_N12; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_25_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 116 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.616 ns) + CELL(0.178 ns) 102.602 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[152\]~633 240 COMB LCCOMB_X21_Y20_N12 3 " "Info: 240: + IC(0.616 ns) + CELL(0.178 ns) = 102.602 ns; Loc. = LCCOMB_X21_Y20_N12; Fanout = 3; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[152\]~633'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.794 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[152]~633 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.838 ns) + CELL(0.517 ns) 103.957 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_26_result_int\[3\]~5 241 COMB LCCOMB_X20_Y20_N20 2 " "Info: 241: + IC(0.838 ns) + CELL(0.517 ns) = 103.957 ns; Loc. = LCCOMB_X20_Y20_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_26_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.355 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[152]~633 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 121 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 104.037 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_26_result_int\[4\]~7 242 COMB LCCOMB_X20_Y20_N22 1 " "Info: 242: + IC(0.000 ns) + CELL(0.080 ns) = 104.037 ns; Loc. = LCCOMB_X20_Y20_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_26_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 121 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 104.117 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_26_result_int\[5\]~9 243 COMB LCCOMB_X20_Y20_N24 1 " "Info: 243: + IC(0.000 ns) + CELL(0.080 ns) = 104.117 ns; Loc. = LCCOMB_X20_Y20_N24; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_26_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 121 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 104.575 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_26_result_int\[6\]~10 244 COMB LCCOMB_X20_Y20_N26 13 " "Info: 244: + IC(0.000 ns) + CELL(0.458 ns) = 104.575 ns; Loc. = LCCOMB_X20_Y20_N26; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_26_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 121 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(2.068 ns) + CELL(0.177 ns) 106.820 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[156\]~520 245 COMB LCCOMB_X36_Y21_N10 2 " "Info: 245: + IC(2.068 ns) + CELL(0.177 ns) = 106.820 ns; Loc. = LCCOMB_X36_Y21_N10; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[156\]~520'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "2.245 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[156]~520 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.552 ns) + CELL(0.517 ns) 107.889 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[1\]~1 246 COMB LCCOMB_X37_Y21_N16 2 " "Info: 246: + IC(0.552 ns) + CELL(0.517 ns) = 107.889 ns; Loc. = LCCOMB_X37_Y21_N16; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.069 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[156]~520 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 126 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 107.969 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[2\]~3 247 COMB LCCOMB_X37_Y21_N18 2 " "Info: 247: + IC(0.000 ns) + CELL(0.080 ns) = 107.969 ns; Loc. = LCCOMB_X37_Y21_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 126 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 108.049 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[3\]~5 248 COMB LCCOMB_X37_Y21_N20 2 " "Info: 248: + IC(0.000 ns) + CELL(0.080 ns) = 108.049 ns; Loc. = LCCOMB_X37_Y21_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 126 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 108.129 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[4\]~7 249 COMB LCCOMB_X37_Y21_N22 1 " "Info: 249: + IC(0.000 ns) + CELL(0.080 ns) = 108.129 ns; Loc. = LCCOMB_X37_Y21_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 126 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 108.209 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[5\]~9 250 COMB LCCOMB_X37_Y21_N24 1 " "Info: 250: + IC(0.000 ns) + CELL(0.080 ns) = 108.209 ns; Loc. = LCCOMB_X37_Y21_N24; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 126 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 108.667 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[6\]~10 251 COMB LCCOMB_X37_Y21_N26 13 " "Info: 251: + IC(0.000 ns) + CELL(0.458 ns) = 108.667 ns; Loc. = LCCOMB_X37_Y21_N26; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_27_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 126 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.616 ns) + CELL(0.319 ns) 109.602 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[162\]~526 252 COMB LCCOMB_X36_Y21_N20 2 " "Info: 252: + IC(0.616 ns) + CELL(0.319 ns) = 109.602 ns; Loc. = LCCOMB_X36_Y21_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[162\]~526'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.935 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[162]~526 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.546 ns) + CELL(0.517 ns) 110.665 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[1\]~1 253 COMB LCCOMB_X37_Y21_N0 2 " "Info: 253: + IC(0.546 ns) + CELL(0.517 ns) = 110.665 ns; Loc. = LCCOMB_X37_Y21_N0; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.063 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[162]~526 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 131 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 110.745 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[2\]~3 254 COMB LCCOMB_X37_Y21_N2 2 " "Info: 254: + IC(0.000 ns) + CELL(0.080 ns) = 110.745 ns; Loc. = LCCOMB_X37_Y21_N2; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 131 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 110.825 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[3\]~5 255 COMB LCCOMB_X37_Y21_N4 2 " "Info: 255: + IC(0.000 ns) + CELL(0.080 ns) = 110.825 ns; Loc. = LCCOMB_X37_Y21_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 131 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 110.905 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[4\]~7 256 COMB LCCOMB_X37_Y21_N6 1 " "Info: 256: + IC(0.000 ns) + CELL(0.080 ns) = 110.905 ns; Loc. = LCCOMB_X37_Y21_N6; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 131 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 110.985 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[5\]~9 257 COMB LCCOMB_X37_Y21_N8 1 " "Info: 257: + IC(0.000 ns) + CELL(0.080 ns) = 110.985 ns; Loc. = LCCOMB_X37_Y21_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 131 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 111.443 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[6\]~10 258 COMB LCCOMB_X37_Y21_N10 13 " "Info: 258: + IC(0.000 ns) + CELL(0.458 ns) = 111.443 ns; Loc. = LCCOMB_X37_Y21_N10; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_28_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 131 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.180 ns) + CELL(0.322 ns) 112.945 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[169\]~532 259 COMB LCCOMB_X39_Y20_N6 2 " "Info: 259: + IC(1.180 ns) + CELL(0.322 ns) = 112.945 ns; Loc. = LCCOMB_X39_Y20_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[169\]~532'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.502 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[169]~532 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.557 ns) + CELL(0.517 ns) 114.019 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[2\]~3 260 COMB LCCOMB_X38_Y20_N4 2 " "Info: 260: + IC(0.557 ns) + CELL(0.517 ns) = 114.019 ns; Loc. = LCCOMB_X38_Y20_N4; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.074 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[169]~532 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 136 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 114.099 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[3\]~5 261 COMB LCCOMB_X38_Y20_N6 2 " "Info: 261: + IC(0.000 ns) + CELL(0.080 ns) = 114.099 ns; Loc. = LCCOMB_X38_Y20_N6; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 136 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 114.179 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[4\]~7 262 COMB LCCOMB_X38_Y20_N8 1 " "Info: 262: + IC(0.000 ns) + CELL(0.080 ns) = 114.179 ns; Loc. = LCCOMB_X38_Y20_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 136 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 114.259 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[5\]~9 263 COMB LCCOMB_X38_Y20_N10 1 " "Info: 263: + IC(0.000 ns) + CELL(0.080 ns) = 114.259 ns; Loc. = LCCOMB_X38_Y20_N10; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 136 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 114.717 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[6\]~10 264 COMB LCCOMB_X38_Y20_N12 13 " "Info: 264: + IC(0.000 ns) + CELL(0.458 ns) = 114.717 ns; Loc. = LCCOMB_X38_Y20_N12; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_29_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 136 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.622 ns) + CELL(0.178 ns) 115.517 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[176\]~637 265 COMB LCCOMB_X39_Y20_N14 3 " "Info: 265: + IC(0.622 ns) + CELL(0.178 ns) = 115.517 ns; Loc. = LCCOMB_X39_Y20_N14; Fanout = 3; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[176\]~637'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.800 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[176]~637 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.862 ns) + CELL(0.517 ns) 116.896 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_30_result_int\[3\]~5 266 COMB LCCOMB_X38_Y20_N18 2 " "Info: 266: + IC(0.862 ns) + CELL(0.517 ns) = 116.896 ns; Loc. = LCCOMB_X38_Y20_N18; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_30_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.379 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[176]~637 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 146 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 116.976 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_30_result_int\[4\]~7 267 COMB LCCOMB_X38_Y20_N20 1 " "Info: 267: + IC(0.000 ns) + CELL(0.080 ns) = 116.976 ns; Loc. = LCCOMB_X38_Y20_N20; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_30_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 146 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 117.056 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_30_result_int\[5\]~9 268 COMB LCCOMB_X38_Y20_N22 1 " "Info: 268: + IC(0.000 ns) + CELL(0.080 ns) = 117.056 ns; Loc. = LCCOMB_X38_Y20_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_30_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 146 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 117.514 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_30_result_int\[6\]~10 269 COMB LCCOMB_X38_Y20_N24 13 " "Info: 269: + IC(0.000 ns) + CELL(0.458 ns) = 117.514 ns; Loc. = LCCOMB_X38_Y20_N24; Fanout = 13; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_30_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 146 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.914 ns) + CELL(0.322 ns) 118.750 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[180\]~548 270 COMB LCCOMB_X37_Y22_N26 2 " "Info: 270: + IC(0.914 ns) + CELL(0.322 ns) = 118.750 ns; Loc. = LCCOMB_X37_Y22_N26; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[180\]~548'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.236 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[180]~548 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.895 ns) + CELL(0.517 ns) 120.162 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[1\]~1 271 COMB LCCOMB_X37_Y20_N20 2 " "Info: 271: + IC(0.895 ns) + CELL(0.517 ns) = 120.162 ns; Loc. = LCCOMB_X37_Y20_N20; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.412 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[180]~548 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[1]~1 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 151 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 120.242 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[2\]~3 272 COMB LCCOMB_X37_Y20_N22 2 " "Info: 272: + IC(0.000 ns) + CELL(0.080 ns) = 120.242 ns; Loc. = LCCOMB_X37_Y20_N22; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[2\]~3'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[2]~3 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 151 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 120.322 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[3\]~5 273 COMB LCCOMB_X37_Y20_N24 2 " "Info: 273: + IC(0.000 ns) + CELL(0.080 ns) = 120.322 ns; Loc. = LCCOMB_X37_Y20_N24; Fanout = 2; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[3\]~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[3]~5 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 151 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 120.402 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[4\]~7 274 COMB LCCOMB_X37_Y20_N26 1 " "Info: 274: + IC(0.000 ns) + CELL(0.080 ns) = 120.402 ns; Loc. = LCCOMB_X37_Y20_N26; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[4\]~7'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[4]~7 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 151 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.080 ns) 120.482 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[5\]~9 275 COMB LCCOMB_X37_Y20_N28 1 " "Info: 275: + IC(0.000 ns) + CELL(0.080 ns) = 120.482 ns; Loc. = LCCOMB_X37_Y20_N28; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[5\]~9'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.080 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[5]~9 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 151 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.458 ns) 120.940 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[6\]~10 276 COMB LCCOMB_X37_Y20_N30 10 " "Info: 276: + IC(0.000 ns) + CELL(0.458 ns) = 120.940 ns; Loc. = LCCOMB_X37_Y20_N30; Fanout = 10; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|add_sub_31_result_int\[6\]~10'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.458 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[6]~10 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 151 23 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.981 ns) + CELL(0.178 ns) 123.099 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[187\]~550 277 COMB LCCOMB_X13_Y19_N18 3 " "Info: 277: + IC(1.981 ns) + CELL(0.178 ns) = 123.099 ns; Loc. = LCCOMB_X13_Y19_N18; Fanout = 3; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|alt_u_div_k2f:divider\|StageOut\[187\]~550'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "2.159 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[187]~550 } "NODE_NAME" } } { "db/alt_u_div_k2f.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/alt_u_div_k2f.tdf" 198 10 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.802 ns) + CELL(0.521 ns) 125.422 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|op_2~2 278 COMB LCCOMB_X36_Y20_N16 1 " "Info: 278: + IC(1.802 ns) + CELL(0.521 ns) = 125.422 ns; Loc. = LCCOMB_X36_Y20_N16; Fanout = 1; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|op_2~2'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "2.323 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[187]~550 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|op_2~2 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(2.114 ns) + CELL(0.178 ns) 127.714 ns Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|remainder\[1\]~1 279 COMB LCCOMB_X13_Y19_N22 8 " "Info: 279: + IC(2.114 ns) + CELL(0.178 ns) = 127.714 ns; Loc. = LCCOMB_X13_Y19_N22; Fanout = 8; COMB Node = 'Arkanoid:inst\|lpm_divide:Mod1\|lpm_divide_ako:auto_generated\|abs_divider_kbg:divider\|remainder\[1\]~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "2.292 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|op_2~2 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|remainder[1]~1 } "NODE_NAME" } } { "db/abs_divider_kbg.tdf" "" { Text "G:/Verilog/Arkanoid2PDE1/db/abs_divider_kbg.tdf" 33 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.137 ns) + CELL(0.322 ns) 129.173 ns Arkanoid:inst\|Equal36~0 280 COMB LCCOMB_X9_Y20_N22 3 " "Info: 280: + IC(1.137 ns) + CELL(0.322 ns) = 129.173 ns; Loc. = LCCOMB_X9_Y20_N22; Fanout = 3; COMB Node = 'Arkanoid:inst\|Equal36~0'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.459 ns" { Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|remainder[1]~1 Arkanoid:inst|Equal36~0 } "NODE_NAME" } } { "int_to_digital.v" "" { Text "G:/Verilog/Arkanoid2PDE1/int_to_digital.v" 35 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.299 ns) + CELL(0.178 ns) 129.650 ns Arkanoid:inst\|low~4 281 COMB LCCOMB_X9_Y20_N16 4 " "Info: 281: + IC(0.299 ns) + CELL(0.178 ns) = 129.650 ns; Loc. = LCCOMB_X9_Y20_N16; Fanout = 4; COMB Node = 'Arkanoid:inst\|low~4'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.477 ns" { Arkanoid:inst|Equal36~0 Arkanoid:inst|low~4 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.798 ns) + CELL(0.322 ns) 130.770 ns Arkanoid:inst\|low~5 282 COMB LCCOMB_X13_Y19_N26 3 " "Info: 282: + IC(0.798 ns) + CELL(0.322 ns) = 130.770 ns; Loc. = LCCOMB_X13_Y19_N26; Fanout = 3; COMB Node = 'Arkanoid:inst\|low~5'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.120 ns" { Arkanoid:inst|low~4 Arkanoid:inst|low~5 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.159 ns) + CELL(0.178 ns) 132.107 ns Arkanoid:inst\|low~29 283 COMB LCCOMB_X9_Y20_N8 1 " "Info: 283: + IC(1.159 ns) + CELL(0.178 ns) = 132.107 ns; Loc. = LCCOMB_X9_Y20_N8; Fanout = 1; COMB Node = 'Arkanoid:inst\|low~29'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.337 ns" { Arkanoid:inst|low~5 Arkanoid:inst|low~29 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.096 ns) 132.203 ns Arkanoid:inst\|hex0_\[6\] 284 REG LCFF_X9_Y20_N9 1 " "Info: 284: + IC(0.000 ns) + CELL(0.096 ns) = 132.203 ns; Loc. = LCFF_X9_Y20_N9; Fanout = 1; REG Node = 'Arkanoid:inst\|hex0_\[6\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.096 ns" { Arkanoid:inst|low~29 Arkanoid:inst|hex0_[6] } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "60.731 ns ( 45.94 % ) " "Info: Total cell delay = 60.731 ns ( 45.94 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "71.472 ns ( 54.06 % ) " "Info: Total interconnect delay = 71.472 ns ( 54.06 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "132.203 ns" { Arkanoid:inst|platform1_position[3] Arkanoid:inst|platform1_position~64 Arkanoid:inst|platform1_position~68 Arkanoid:inst|platform1_position~74 Arkanoid:inst|Add2~80 Arkanoid:inst|LessThan1~6 Arkanoid:inst|LessThan1~9 Arkanoid:inst|LessThan1~10 Arkanoid:inst|Add3~1 Arkanoid:inst|Add3~3 Arkanoid:inst|Add3~5 Arkanoid:inst|Add3~7 Arkanoid:inst|Add3~9 Arkanoid:inst|Add3~11 Arkanoid:inst|Add3~13 Arkanoid:inst|Add3~15 Arkanoid:inst|Add3~17 Arkanoid:inst|Add3~19 Arkanoid:inst|Add3~21 Arkanoid:inst|Add3~23 Arkanoid:inst|Add3~25 Arkanoid:inst|Add3~27 Arkanoid:inst|Add3~28 Arkanoid:inst|platform1_position~127 Arkanoid:inst|Add13~29 Arkanoid:inst|Add13~31 Arkanoid:inst|Add13~33 Arkanoid:inst|Add13~35 Arkanoid:inst|Add13~37 Arkanoid:inst|Add13~39 Arkanoid:inst|Add13~41 Arkanoid:inst|Add13~43 Arkanoid:inst|Add13~45 Arkanoid:inst|Add13~47 Arkanoid:inst|Add13~49 Arkanoid:inst|Add13~51 Arkanoid:inst|Add13~52 Arkanoid:inst|LessThan143~53 Arkanoid:inst|LessThan143~55 Arkanoid:inst|LessThan143~57 Arkanoid:inst|LessThan143~59 Arkanoid:inst|LessThan143~61 Arkanoid:inst|LessThan143~62 Arkanoid:inst|always2~6 Arkanoid:inst|Add14~1 Arkanoid:inst|Add14~3 Arkanoid:inst|Add14~5 Arkanoid:inst|Add14~7 Arkanoid:inst|Add14~9 Arkanoid:inst|Add14~11 Arkanoid:inst|Add14~13 Arkanoid:inst|Add14~15 Arkanoid:inst|Add14~17 Arkanoid:inst|Add14~19 Arkanoid:inst|Add14~21 Arkanoid:inst|Add14~23 Arkanoid:inst|Add14~25 Arkanoid:inst|Add14~27 Arkanoid:inst|Add14~29 Arkanoid:inst|Add14~31 Arkanoid:inst|Add14~33 Arkanoid:inst|Add14~35 Arkanoid:inst|Add14~37 Arkanoid:inst|Add14~39 Arkanoid:inst|Add14~41 Arkanoid:inst|Add14~43 Arkanoid:inst|Add14~45 Arkanoid:inst|Add14~47 Arkanoid:inst|Add14~49 Arkanoid:inst|Add14~51 Arkanoid:inst|Add14~53 Arkanoid:inst|Add14~55 Arkanoid:inst|Add14~57 Arkanoid:inst|Add14~59 Arkanoid:inst|Add14~61 Arkanoid:inst|Add14~63 Arkanoid:inst|Add14~65 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~4 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~8 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~12 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~14 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~16 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~18 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~20 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~22 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~24 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~26 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~28 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~30 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~32 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~34 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~36 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~38 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~40 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~42 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~44 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~46 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~48 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~50 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~52 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~54 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~56 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~57 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[4]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[18]~358 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[5]~8 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[24]~365 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[32]~369 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[36]~380 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[44]~615 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[50]~616 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[56]~617 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[60]~407 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[66]~415 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[72]~422 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[4]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[82]~423 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[84]~435 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[92]~623 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[97]~447 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[102]~457 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[108]~464 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[116]~627 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[122]~474 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[126]~484 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[132]~492 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[138]~498 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[146]~502 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[152]~633 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[156]~520 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[162]~526 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[169]~532 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[176]~637 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[180]~548 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[187]~550 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|op_2~2 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|remainder[1]~1 Arkanoid:inst|Equal36~0 Arkanoid:inst|low~4 Arkanoid:inst|low~5 Arkanoid:inst|low~29 Arkanoid:inst|hex0_[6] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "132.203 ns" { Arkanoid:inst|platform1_position[3] {} Arkanoid:inst|platform1_position~64 {} Arkanoid:inst|platform1_position~68 {} Arkanoid:inst|platform1_position~74 {} Arkanoid:inst|Add2~80 {} Arkanoid:inst|LessThan1~6 {} Arkanoid:inst|LessThan1~9 {} Arkanoid:inst|LessThan1~10 {} Arkanoid:inst|Add3~1 {} Arkanoid:inst|Add3~3 {} Arkanoid:inst|Add3~5 {} Arkanoid:inst|Add3~7 {} Arkanoid:inst|Add3~9 {} Arkanoid:inst|Add3~11 {} Arkanoid:inst|Add3~13 {} Arkanoid:inst|Add3~15 {} Arkanoid:inst|Add3~17 {} Arkanoid:inst|Add3~19 {} Arkanoid:inst|Add3~21 {} Arkanoid:inst|Add3~23 {} Arkanoid:inst|Add3~25 {} Arkanoid:inst|Add3~27 {} Arkanoid:inst|Add3~28 {} Arkanoid:inst|platform1_position~127 {} Arkanoid:inst|Add13~29 {} Arkanoid:inst|Add13~31 {} Arkanoid:inst|Add13~33 {} Arkanoid:inst|Add13~35 {} Arkanoid:inst|Add13~37 {} Arkanoid:inst|Add13~39 {} Arkanoid:inst|Add13~41 {} Arkanoid:inst|Add13~43 {} Arkanoid:inst|Add13~45 {} Arkanoid:inst|Add13~47 {} Arkanoid:inst|Add13~49 {} Arkanoid:inst|Add13~51 {} Arkanoid:inst|Add13~52 {} Arkanoid:inst|LessThan143~53 {} Arkanoid:inst|LessThan143~55 {} Arkanoid:inst|LessThan143~57 {} Arkanoid:inst|LessThan143~59 {} Arkanoid:inst|LessThan143~61 {} Arkanoid:inst|LessThan143~62 {} Arkanoid:inst|always2~6 {} Arkanoid:inst|Add14~1 {} Arkanoid:inst|Add14~3 {} Arkanoid:inst|Add14~5 {} Arkanoid:inst|Add14~7 {} Arkanoid:inst|Add14~9 {} Arkanoid:inst|Add14~11 {} Arkanoid:inst|Add14~13 {} Arkanoid:inst|Add14~15 {} Arkanoid:inst|Add14~17 {} Arkanoid:inst|Add14~19 {} Arkanoid:inst|Add14~21 {} Arkanoid:inst|Add14~23 {} Arkanoid:inst|Add14~25 {} Arkanoid:inst|Add14~27 {} Arkanoid:inst|Add14~29 {} Arkanoid:inst|Add14~31 {} Arkanoid:inst|Add14~33 {} Arkanoid:inst|Add14~35 {} Arkanoid:inst|Add14~37 {} Arkanoid:inst|Add14~39 {} Arkanoid:inst|Add14~41 {} Arkanoid:inst|Add14~43 {} Arkanoid:inst|Add14~45 {} Arkanoid:inst|Add14~47 {} Arkanoid:inst|Add14~49 {} Arkanoid:inst|Add14~51 {} Arkanoid:inst|Add14~53 {} Arkanoid:inst|Add14~55 {} Arkanoid:inst|Add14~57 {} Arkanoid:inst|Add14~59 {} Arkanoid:inst|Add14~61 {} Arkanoid:inst|Add14~63 {} Arkanoid:inst|Add14~65 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~4 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~6 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~8 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~12 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~14 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~16 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~18 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~20 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~22 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~24 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~26 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~28 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~30 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~32 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~34 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~36 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~38 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~40 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~42 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~44 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~46 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~48 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~50 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~52 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~54 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~56 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~57 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[4]~6 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[18]~358 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[5]~8 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[24]~365 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[32]~369 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[36]~380 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[44]~615 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[50]~616 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[56]~617 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[60]~407 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[66]~415 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[72]~422 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[4]~6 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[82]~423 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[84]~435 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[92]~623 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[97]~447 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[102]~457 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[108]~464 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[116]~627 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[122]~474 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[126]~484 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[132]~492 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[138]~498 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[146]~502 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[152]~633 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[156]~520 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[162]~526 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[169]~532 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[176]~637 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[180]~548 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[187]~550 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|op_2~2 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|remainder[1]~1 {} Arkanoid:inst|Equal36~0 {} Arkanoid:inst|low~4 {} Arkanoid:inst|low~5 {} Arkanoid:inst|low~29 {} Arkanoid:inst|hex0_[6] {} } { 0.000ns 1.188ns 0.313ns 0.830ns 1.490ns 0.926ns 0.298ns 0.303ns 0.901ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.165ns 1.159ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.820ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.097ns 2.158ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.950ns 1.012ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.186ns 0.000ns 0.000ns 0.000ns 0.373ns 0.559ns 0.000ns 0.000ns 0.000ns 0.000ns 1.235ns 1.187ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.249ns 0.544ns 0.000ns 0.000ns 0.000ns 0.502ns 0.535ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.562ns 1.148ns 0.000ns 0.000ns 0.000ns 0.886ns 1.168ns 0.000ns 0.000ns 0.000ns 0.889ns 1.198ns 0.000ns 0.000ns 0.000ns 0.871ns 0.854ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.893ns 0.552ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.895ns 0.866ns 0.000ns 0.000ns 0.000ns 0.537ns 0.812ns 0.000ns 0.941ns 0.333ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.628ns 0.552ns 0.000ns 0.000ns 0.000ns 0.613ns 0.540ns 0.000ns 0.000ns 0.000ns 0.000ns 0.611ns 0.324ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.134ns 0.809ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.409ns 1.417ns 0.000ns 0.000ns 0.000ns 0.578ns 1.476ns 0.000ns 0.000ns 0.000ns 0.569ns 0.820ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.900ns 0.548ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.622ns 0.526ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.833ns 1.622ns 0.000ns 0.000ns 0.000ns 0.616ns 0.838ns 0.000ns 0.000ns 0.000ns 2.068ns 0.552ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.616ns 0.546ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.180ns 0.557ns 0.000ns 0.000ns 0.000ns 0.000ns 0.622ns 0.862ns 0.000ns 0.000ns 0.000ns 0.914ns 0.895ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.981ns 1.802ns 2.114ns 1.137ns 0.299ns 0.798ns 1.159ns 0.000ns } { 0.000ns 0.178ns 0.512ns 0.521ns 0.322ns 0.455ns 0.491ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.161ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.458ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.161ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.161ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.517ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.495ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.177ns 0.517ns 0.080ns 0.080ns 0.080ns 0.174ns 0.458ns 0.177ns 0.495ns 0.080ns 0.080ns 0.458ns 0.521ns 0.517ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.174ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.080ns 0.080ns 0.174ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.174ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.177ns 0.517ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.080ns 0.080ns 0.080ns 0.174ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.174ns 0.458ns 0.322ns 0.495ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.177ns 0.517ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.177ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.521ns 0.178ns 0.322ns 0.178ns 0.322ns 0.178ns 0.096ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-0.019 ns - Smallest " "Info: - Smallest clock skew is -0.019 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_50MHz destination 4.591 ns + Shortest register " "Info: + Shortest clock path from clock \"clk_50MHz\" to destination register is 4.591 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.026 ns) 1.026 ns clk_50MHz 1 CLK PIN_L1 1 " "Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_L1; Fanout = 1; CLK Node = 'clk_50MHz'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_50MHz } "NODE_NAME" } } { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { -168 -72 96 -152 "clk_50MHz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.404 ns) + CELL(0.879 ns) 2.309 ns ClockDivider:inst1\|clk25MHz_ 2 REG LCFF_X1_Y13_N29 2 " "Info: 2: + IC(0.404 ns) + CELL(0.879 ns) = 2.309 ns; Loc. = LCFF_X1_Y13_N29; Fanout = 2; REG Node = 'ClockDivider:inst1\|clk25MHz_'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.283 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.703 ns) + CELL(0.000 ns) 3.012 ns ClockDivider:inst1\|clk25MHz_~clkctrl 3 COMB CLKCTRL_G0 1085 " "Info: 3: + IC(0.703 ns) + CELL(0.000 ns) = 3.012 ns; Loc. = CLKCTRL_G0; Fanout = 1085; COMB Node = 'ClockDivider:inst1\|clk25MHz_~clkctrl'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.703 ns" { ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.977 ns) + CELL(0.602 ns) 4.591 ns Arkanoid:inst\|hex0_\[6\] 4 REG LCFF_X9_Y20_N9 1 " "Info: 4: + IC(0.977 ns) + CELL(0.602 ns) = 4.591 ns; Loc. = LCFF_X9_Y20_N9; Fanout = 1; REG Node = 'Arkanoid:inst\|hex0_\[6\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.579 ns" { ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|hex0_[6] } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.507 ns ( 54.61 % ) " "Info: Total cell delay = 2.507 ns ( 54.61 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "2.084 ns ( 45.39 % ) " "Info: Total interconnect delay = 2.084 ns ( 45.39 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.591 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|hex0_[6] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.591 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Arkanoid:inst|hex0_[6] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.977ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_50MHz source 4.610 ns - Longest register " "Info: - Longest clock path from clock \"clk_50MHz\" to source register is 4.610 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.026 ns) 1.026 ns clk_50MHz 1 CLK PIN_L1 1 " "Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_L1; Fanout = 1; CLK Node = 'clk_50MHz'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_50MHz } "NODE_NAME" } } { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { -168 -72 96 -152 "clk_50MHz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.404 ns) + CELL(0.879 ns) 2.309 ns ClockDivider:inst1\|clk25MHz_ 2 REG LCFF_X1_Y13_N29 2 " "Info: 2: + IC(0.404 ns) + CELL(0.879 ns) = 2.309 ns; Loc. = LCFF_X1_Y13_N29; Fanout = 2; REG Node = 'ClockDivider:inst1\|clk25MHz_'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.283 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.703 ns) + CELL(0.000 ns) 3.012 ns ClockDivider:inst1\|clk25MHz_~clkctrl 3 COMB CLKCTRL_G0 1085 " "Info: 3: + IC(0.703 ns) + CELL(0.000 ns) = 3.012 ns; Loc. = CLKCTRL_G0; Fanout = 1085; COMB Node = 'ClockDivider:inst1\|clk25MHz_~clkctrl'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.703 ns" { ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.996 ns) + CELL(0.602 ns) 4.610 ns Arkanoid:inst\|platform1_position\[3\] 4 REG LCFF_X33_Y12_N7 4 " "Info: 4: + IC(0.996 ns) + CELL(0.602 ns) = 4.610 ns; Loc. = LCFF_X33_Y12_N7; Fanout = 4; REG Node = 'Arkanoid:inst\|platform1_position\[3\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.598 ns" { ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|platform1_position[3] } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 19 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.507 ns ( 54.38 % ) " "Info: Total cell delay = 2.507 ns ( 54.38 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "2.103 ns ( 45.62 % ) " "Info: Total interconnect delay = 2.103 ns ( 45.62 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.610 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|platform1_position[3] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.610 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Arkanoid:inst|platform1_position[3] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.996ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.591 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|hex0_[6] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.591 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Arkanoid:inst|hex0_[6] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.977ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } } { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.610 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|platform1_position[3] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.610 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Arkanoid:inst|platform1_position[3] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.996ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TCO_DELAY" "0.277 ns + " "Info: + Micro clock to output delay of source is 0.277 ns" {  } { { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 19 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TSU_DELAY" "-0.038 ns + " "Info: + Micro setup delay of destination is -0.038 ns" {  } { { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 19 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "132.203 ns" { Arkanoid:inst|platform1_position[3] Arkanoid:inst|platform1_position~64 Arkanoid:inst|platform1_position~68 Arkanoid:inst|platform1_position~74 Arkanoid:inst|Add2~80 Arkanoid:inst|LessThan1~6 Arkanoid:inst|LessThan1~9 Arkanoid:inst|LessThan1~10 Arkanoid:inst|Add3~1 Arkanoid:inst|Add3~3 Arkanoid:inst|Add3~5 Arkanoid:inst|Add3~7 Arkanoid:inst|Add3~9 Arkanoid:inst|Add3~11 Arkanoid:inst|Add3~13 Arkanoid:inst|Add3~15 Arkanoid:inst|Add3~17 Arkanoid:inst|Add3~19 Arkanoid:inst|Add3~21 Arkanoid:inst|Add3~23 Arkanoid:inst|Add3~25 Arkanoid:inst|Add3~27 Arkanoid:inst|Add3~28 Arkanoid:inst|platform1_position~127 Arkanoid:inst|Add13~29 Arkanoid:inst|Add13~31 Arkanoid:inst|Add13~33 Arkanoid:inst|Add13~35 Arkanoid:inst|Add13~37 Arkanoid:inst|Add13~39 Arkanoid:inst|Add13~41 Arkanoid:inst|Add13~43 Arkanoid:inst|Add13~45 Arkanoid:inst|Add13~47 Arkanoid:inst|Add13~49 Arkanoid:inst|Add13~51 Arkanoid:inst|Add13~52 Arkanoid:inst|LessThan143~53 Arkanoid:inst|LessThan143~55 Arkanoid:inst|LessThan143~57 Arkanoid:inst|LessThan143~59 Arkanoid:inst|LessThan143~61 Arkanoid:inst|LessThan143~62 Arkanoid:inst|always2~6 Arkanoid:inst|Add14~1 Arkanoid:inst|Add14~3 Arkanoid:inst|Add14~5 Arkanoid:inst|Add14~7 Arkanoid:inst|Add14~9 Arkanoid:inst|Add14~11 Arkanoid:inst|Add14~13 Arkanoid:inst|Add14~15 Arkanoid:inst|Add14~17 Arkanoid:inst|Add14~19 Arkanoid:inst|Add14~21 Arkanoid:inst|Add14~23 Arkanoid:inst|Add14~25 Arkanoid:inst|Add14~27 Arkanoid:inst|Add14~29 Arkanoid:inst|Add14~31 Arkanoid:inst|Add14~33 Arkanoid:inst|Add14~35 Arkanoid:inst|Add14~37 Arkanoid:inst|Add14~39 Arkanoid:inst|Add14~41 Arkanoid:inst|Add14~43 Arkanoid:inst|Add14~45 Arkanoid:inst|Add14~47 Arkanoid:inst|Add14~49 Arkanoid:inst|Add14~51 Arkanoid:inst|Add14~53 Arkanoid:inst|Add14~55 Arkanoid:inst|Add14~57 Arkanoid:inst|Add14~59 Arkanoid:inst|Add14~61 Arkanoid:inst|Add14~63 Arkanoid:inst|Add14~65 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~4 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~8 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~12 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~14 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~16 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~18 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~20 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~22 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~24 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~26 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~28 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~30 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~32 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~34 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~36 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~38 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~40 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~42 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~44 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~46 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~48 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~50 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~52 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~54 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~56 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~57 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[4]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[18]~358 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[5]~8 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[24]~365 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[32]~369 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[36]~380 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[44]~615 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[50]~616 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[56]~617 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[60]~407 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[66]~415 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[72]~422 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[4]~6 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[82]~423 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[84]~435 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[92]~623 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[97]~447 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[102]~457 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[108]~464 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[116]~627 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[122]~474 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[126]~484 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[132]~492 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[138]~498 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[146]~502 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[152]~633 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[156]~520 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[162]~526 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[169]~532 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[176]~637 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[180]~548 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[1]~1 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[2]~3 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[3]~5 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[4]~7 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[5]~9 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[6]~10 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[187]~550 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|op_2~2 Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|remainder[1]~1 Arkanoid:inst|Equal36~0 Arkanoid:inst|low~4 Arkanoid:inst|low~5 Arkanoid:inst|low~29 Arkanoid:inst|hex0_[6] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "132.203 ns" { Arkanoid:inst|platform1_position[3] {} Arkanoid:inst|platform1_position~64 {} Arkanoid:inst|platform1_position~68 {} Arkanoid:inst|platform1_position~74 {} Arkanoid:inst|Add2~80 {} Arkanoid:inst|LessThan1~6 {} Arkanoid:inst|LessThan1~9 {} Arkanoid:inst|LessThan1~10 {} Arkanoid:inst|Add3~1 {} Arkanoid:inst|Add3~3 {} Arkanoid:inst|Add3~5 {} Arkanoid:inst|Add3~7 {} Arkanoid:inst|Add3~9 {} Arkanoid:inst|Add3~11 {} Arkanoid:inst|Add3~13 {} Arkanoid:inst|Add3~15 {} Arkanoid:inst|Add3~17 {} Arkanoid:inst|Add3~19 {} Arkanoid:inst|Add3~21 {} Arkanoid:inst|Add3~23 {} Arkanoid:inst|Add3~25 {} Arkanoid:inst|Add3~27 {} Arkanoid:inst|Add3~28 {} Arkanoid:inst|platform1_position~127 {} Arkanoid:inst|Add13~29 {} Arkanoid:inst|Add13~31 {} Arkanoid:inst|Add13~33 {} Arkanoid:inst|Add13~35 {} Arkanoid:inst|Add13~37 {} Arkanoid:inst|Add13~39 {} Arkanoid:inst|Add13~41 {} Arkanoid:inst|Add13~43 {} Arkanoid:inst|Add13~45 {} Arkanoid:inst|Add13~47 {} Arkanoid:inst|Add13~49 {} Arkanoid:inst|Add13~51 {} Arkanoid:inst|Add13~52 {} Arkanoid:inst|LessThan143~53 {} Arkanoid:inst|LessThan143~55 {} Arkanoid:inst|LessThan143~57 {} Arkanoid:inst|LessThan143~59 {} Arkanoid:inst|LessThan143~61 {} Arkanoid:inst|LessThan143~62 {} Arkanoid:inst|always2~6 {} Arkanoid:inst|Add14~1 {} Arkanoid:inst|Add14~3 {} Arkanoid:inst|Add14~5 {} Arkanoid:inst|Add14~7 {} Arkanoid:inst|Add14~9 {} Arkanoid:inst|Add14~11 {} Arkanoid:inst|Add14~13 {} Arkanoid:inst|Add14~15 {} Arkanoid:inst|Add14~17 {} Arkanoid:inst|Add14~19 {} Arkanoid:inst|Add14~21 {} Arkanoid:inst|Add14~23 {} Arkanoid:inst|Add14~25 {} Arkanoid:inst|Add14~27 {} Arkanoid:inst|Add14~29 {} Arkanoid:inst|Add14~31 {} Arkanoid:inst|Add14~33 {} Arkanoid:inst|Add14~35 {} Arkanoid:inst|Add14~37 {} Arkanoid:inst|Add14~39 {} Arkanoid:inst|Add14~41 {} Arkanoid:inst|Add14~43 {} Arkanoid:inst|Add14~45 {} Arkanoid:inst|Add14~47 {} Arkanoid:inst|Add14~49 {} Arkanoid:inst|Add14~51 {} Arkanoid:inst|Add14~53 {} Arkanoid:inst|Add14~55 {} Arkanoid:inst|Add14~57 {} Arkanoid:inst|Add14~59 {} Arkanoid:inst|Add14~61 {} Arkanoid:inst|Add14~63 {} Arkanoid:inst|Add14~65 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~4 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~6 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~8 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~12 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~14 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~16 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~18 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~20 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~22 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~24 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~26 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~28 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~30 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~32 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~34 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~36 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~38 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~40 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~42 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~44 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~46 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~48 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~50 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~52 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~54 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~56 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|lpm_abs_0s9:my_abs_num|cs2a[1]~57 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_3_result_int[4]~6 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[18]~358 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_4_result_int[5]~8 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[24]~365 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_5_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[32]~369 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_6_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[36]~380 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_7_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[44]~615 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_8_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[50]~616 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_9_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[56]~617 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_10_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[60]~407 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_11_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[66]~415 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_12_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[72]~422 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_13_result_int[4]~6 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[82]~423 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_14_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[84]~435 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_15_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[92]~623 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_16_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[97]~447 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_17_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[102]~457 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_18_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[108]~464 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_19_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[116]~627 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_20_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[122]~474 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_21_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[126]~484 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_22_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[132]~492 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_23_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[138]~498 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_24_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[146]~502 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_25_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[152]~633 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_26_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[156]~520 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_27_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[162]~526 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_28_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[169]~532 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_29_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[176]~637 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_30_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[180]~548 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[1]~1 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[2]~3 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[3]~5 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[4]~7 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[5]~9 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|add_sub_31_result_int[6]~10 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|alt_u_div_k2f:divider|StageOut[187]~550 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|op_2~2 {} Arkanoid:inst|lpm_divide:Mod1|lpm_divide_ako:auto_generated|abs_divider_kbg:divider|remainder[1]~1 {} Arkanoid:inst|Equal36~0 {} Arkanoid:inst|low~4 {} Arkanoid:inst|low~5 {} Arkanoid:inst|low~29 {} Arkanoid:inst|hex0_[6] {} } { 0.000ns 1.188ns 0.313ns 0.830ns 1.490ns 0.926ns 0.298ns 0.303ns 0.901ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.165ns 1.159ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.820ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.097ns 2.158ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.950ns 1.012ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.186ns 0.000ns 0.000ns 0.000ns 0.373ns 0.559ns 0.000ns 0.000ns 0.000ns 0.000ns 1.235ns 1.187ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.249ns 0.544ns 0.000ns 0.000ns 0.000ns 0.502ns 0.535ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.562ns 1.148ns 0.000ns 0.000ns 0.000ns 0.886ns 1.168ns 0.000ns 0.000ns 0.000ns 0.889ns 1.198ns 0.000ns 0.000ns 0.000ns 0.871ns 0.854ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.893ns 0.552ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.895ns 0.866ns 0.000ns 0.000ns 0.000ns 0.537ns 0.812ns 0.000ns 0.941ns 0.333ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.628ns 0.552ns 0.000ns 0.000ns 0.000ns 0.613ns 0.540ns 0.000ns 0.000ns 0.000ns 0.000ns 0.611ns 0.324ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.134ns 0.809ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.409ns 1.417ns 0.000ns 0.000ns 0.000ns 0.578ns 1.476ns 0.000ns 0.000ns 0.000ns 0.569ns 0.820ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.900ns 0.548ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.622ns 0.526ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.833ns 1.622ns 0.000ns 0.000ns 0.000ns 0.616ns 0.838ns 0.000ns 0.000ns 0.000ns 2.068ns 0.552ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.616ns 0.546ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.180ns 0.557ns 0.000ns 0.000ns 0.000ns 0.000ns 0.622ns 0.862ns 0.000ns 0.000ns 0.000ns 0.914ns 0.895ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.981ns 1.802ns 2.114ns 1.137ns 0.299ns 0.798ns 1.159ns 0.000ns } { 0.000ns 0.178ns 0.512ns 0.521ns 0.322ns 0.455ns 0.491ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.161ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.458ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.495ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.161ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.161ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.174ns 0.080ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.517ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.495ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.177ns 0.517ns 0.080ns 0.080ns 0.080ns 0.174ns 0.458ns 0.177ns 0.495ns 0.080ns 0.080ns 0.458ns 0.521ns 0.517ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.080ns 0.174ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.080ns 0.080ns 0.174ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.174ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.177ns 0.517ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.080ns 0.080ns 0.080ns 0.174ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.174ns 0.458ns 0.322ns 0.495ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.177ns 0.517ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.177ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.319ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.517ns 0.080ns 0.080ns 0.458ns 0.322ns 0.517ns 0.080ns 0.080ns 0.080ns 0.080ns 0.458ns 0.178ns 0.521ns 0.178ns 0.322ns 0.178ns 0.322ns 0.178ns 0.096ns } "" } } { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.591 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|hex0_[6] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.591 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Arkanoid:inst|hex0_[6] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.977ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } } { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.610 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|platform1_position[3] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.610 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Arkanoid:inst|platform1_position[3] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.996ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0 -1}
{ "Info" "ITDB_TSU_RESULT" "Debouncer:inst5\|button_reg\[0\] button4 clk_50MHz 3.159 ns register " "Info: tsu for register \"Debouncer:inst5\|button_reg\[0\]\" (data pin = \"button4\", clock pin = \"clk_50MHz\") is 3.159 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.814 ns + Longest pin register " "Info: + Longest pin to register delay is 7.814 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.864 ns) 0.864 ns button4 1 PIN PIN_R22 1 " "Info: 1: + IC(0.000 ns) + CELL(0.864 ns) = 0.864 ns; Loc. = PIN_R22; Fanout = 1; PIN Node = 'button4'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { button4 } "NODE_NAME" } } { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { 216 -72 96 232 "button4" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(6.537 ns) + CELL(0.413 ns) 7.814 ns Debouncer:inst5\|button_reg\[0\] 2 REG LCFF_X12_Y12_N29 2 " "Info: 2: + IC(6.537 ns) + CELL(0.413 ns) = 7.814 ns; Loc. = LCFF_X12_Y12_N29; Fanout = 2; REG Node = 'Debouncer:inst5\|button_reg\[0\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "6.950 ns" { button4 Debouncer:inst5|button_reg[0] } "NODE_NAME" } } { "debouncer.v" "" { Text "G:/Verilog/Arkanoid2PDE1/debouncer.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.277 ns ( 16.34 % ) " "Info: Total cell delay = 1.277 ns ( 16.34 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "6.537 ns ( 83.66 % ) " "Info: Total interconnect delay = 6.537 ns ( 83.66 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "7.814 ns" { button4 Debouncer:inst5|button_reg[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "7.814 ns" { button4 {} button4~combout {} Debouncer:inst5|button_reg[0] {} } { 0.000ns 0.000ns 6.537ns } { 0.000ns 0.864ns 0.413ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TSU_DELAY" "-0.038 ns + " "Info: + Micro setup delay of destination is -0.038 ns" {  } { { "debouncer.v" "" { Text "G:/Verilog/Arkanoid2PDE1/debouncer.v" 9 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_50MHz destination 4.617 ns - Shortest register " "Info: - Shortest clock path from clock \"clk_50MHz\" to destination register is 4.617 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.026 ns) 1.026 ns clk_50MHz 1 CLK PIN_L1 1 " "Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_L1; Fanout = 1; CLK Node = 'clk_50MHz'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_50MHz } "NODE_NAME" } } { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { -168 -72 96 -152 "clk_50MHz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.404 ns) + CELL(0.879 ns) 2.309 ns ClockDivider:inst1\|clk25MHz_ 2 REG LCFF_X1_Y13_N29 2 " "Info: 2: + IC(0.404 ns) + CELL(0.879 ns) = 2.309 ns; Loc. = LCFF_X1_Y13_N29; Fanout = 2; REG Node = 'ClockDivider:inst1\|clk25MHz_'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.283 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.703 ns) + CELL(0.000 ns) 3.012 ns ClockDivider:inst1\|clk25MHz_~clkctrl 3 COMB CLKCTRL_G0 1085 " "Info: 3: + IC(0.703 ns) + CELL(0.000 ns) = 3.012 ns; Loc. = CLKCTRL_G0; Fanout = 1085; COMB Node = 'ClockDivider:inst1\|clk25MHz_~clkctrl'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.703 ns" { ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.003 ns) + CELL(0.602 ns) 4.617 ns Debouncer:inst5\|button_reg\[0\] 4 REG LCFF_X12_Y12_N29 2 " "Info: 4: + IC(1.003 ns) + CELL(0.602 ns) = 4.617 ns; Loc. = LCFF_X12_Y12_N29; Fanout = 2; REG Node = 'Debouncer:inst5\|button_reg\[0\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.605 ns" { ClockDivider:inst1|clk25MHz_~clkctrl Debouncer:inst5|button_reg[0] } "NODE_NAME" } } { "debouncer.v" "" { Text "G:/Verilog/Arkanoid2PDE1/debouncer.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.507 ns ( 54.30 % ) " "Info: Total cell delay = 2.507 ns ( 54.30 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "2.110 ns ( 45.70 % ) " "Info: Total interconnect delay = 2.110 ns ( 45.70 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.617 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Debouncer:inst5|button_reg[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.617 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Debouncer:inst5|button_reg[0] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 1.003ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "7.814 ns" { button4 Debouncer:inst5|button_reg[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "7.814 ns" { button4 {} button4~combout {} Debouncer:inst5|button_reg[0] {} } { 0.000ns 0.000ns 6.537ns } { 0.000ns 0.864ns 0.413ns } "" } } { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.617 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Debouncer:inst5|button_reg[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.617 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Debouncer:inst5|button_reg[0] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 1.003ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0 -1}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk_50MHz h_sync Arkanoid:inst\|h_counter\[0\] 14.776 ns register " "Info: tco from clock \"clk_50MHz\" to destination pin \"h_sync\" through register \"Arkanoid:inst\|h_counter\[0\]\" is 14.776 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_50MHz source 4.595 ns + Longest register " "Info: + Longest clock path from clock \"clk_50MHz\" to source register is 4.595 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.026 ns) 1.026 ns clk_50MHz 1 CLK PIN_L1 1 " "Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_L1; Fanout = 1; CLK Node = 'clk_50MHz'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_50MHz } "NODE_NAME" } } { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { -168 -72 96 -152 "clk_50MHz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.404 ns) + CELL(0.879 ns) 2.309 ns ClockDivider:inst1\|clk25MHz_ 2 REG LCFF_X1_Y13_N29 2 " "Info: 2: + IC(0.404 ns) + CELL(0.879 ns) = 2.309 ns; Loc. = LCFF_X1_Y13_N29; Fanout = 2; REG Node = 'ClockDivider:inst1\|clk25MHz_'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.283 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.703 ns) + CELL(0.000 ns) 3.012 ns ClockDivider:inst1\|clk25MHz_~clkctrl 3 COMB CLKCTRL_G0 1085 " "Info: 3: + IC(0.703 ns) + CELL(0.000 ns) = 3.012 ns; Loc. = CLKCTRL_G0; Fanout = 1085; COMB Node = 'ClockDivider:inst1\|clk25MHz_~clkctrl'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.703 ns" { ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.981 ns) + CELL(0.602 ns) 4.595 ns Arkanoid:inst\|h_counter\[0\] 4 REG LCFF_X26_Y5_N1 7 " "Info: 4: + IC(0.981 ns) + CELL(0.602 ns) = 4.595 ns; Loc. = LCFF_X26_Y5_N1; Fanout = 7; REG Node = 'Arkanoid:inst\|h_counter\[0\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.583 ns" { ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|h_counter[0] } "NODE_NAME" } } { "vga_sync.v" "" { Text "G:/Verilog/Arkanoid2PDE1/vga_sync.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.507 ns ( 54.56 % ) " "Info: Total cell delay = 2.507 ns ( 54.56 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "2.088 ns ( 45.44 % ) " "Info: Total interconnect delay = 2.088 ns ( 45.44 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.595 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|h_counter[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.595 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Arkanoid:inst|h_counter[0] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.981ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TCO_DELAY" "0.277 ns + " "Info: + Micro clock to output delay of source is 0.277 ns" {  } { { "vga_sync.v" "" { Text "G:/Verilog/Arkanoid2PDE1/vga_sync.v" 9 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.904 ns + Longest register pin " "Info: + Longest register to pin delay is 9.904 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Arkanoid:inst\|h_counter\[0\] 1 REG LCFF_X26_Y5_N1 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X26_Y5_N1; Fanout = 7; REG Node = 'Arkanoid:inst\|h_counter\[0\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { Arkanoid:inst|h_counter[0] } "NODE_NAME" } } { "vga_sync.v" "" { Text "G:/Verilog/Arkanoid2PDE1/vga_sync.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.640 ns) + CELL(0.512 ns) 1.152 ns Arkanoid:inst\|Equal0~0 2 COMB LCCOMB_X27_Y5_N2 3 " "Info: 2: + IC(0.640 ns) + CELL(0.512 ns) = 1.152 ns; Loc. = LCCOMB_X27_Y5_N2; Fanout = 3; COMB Node = 'Arkanoid:inst\|Equal0~0'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.152 ns" { Arkanoid:inst|h_counter[0] Arkanoid:inst|Equal0~0 } "NODE_NAME" } } { "vga_sync.v" "" { Text "G:/Verilog/Arkanoid2PDE1/vga_sync.v" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.181 ns) + CELL(0.545 ns) 2.878 ns Arkanoid:inst\|LessThan156~0 3 COMB LCCOMB_X25_Y6_N22 1 " "Info: 3: + IC(1.181 ns) + CELL(0.545 ns) = 2.878 ns; Loc. = LCCOMB_X25_Y6_N22; Fanout = 1; COMB Node = 'Arkanoid:inst\|LessThan156~0'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.726 ns" { Arkanoid:inst|Equal0~0 Arkanoid:inst|LessThan156~0 } "NODE_NAME" } } { "Arkanoid.v" "" { Text "G:/Verilog/Arkanoid2PDE1/Arkanoid.v" 385 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.301 ns) + CELL(0.521 ns) 3.700 ns Arkanoid:inst\|h_sync~1 4 COMB LCCOMB_X25_Y6_N4 1 " "Info: 4: + IC(0.301 ns) + CELL(0.521 ns) = 3.700 ns; Loc. = LCCOMB_X25_Y6_N4; Fanout = 1; COMB Node = 'Arkanoid:inst\|h_sync~1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.822 ns" { Arkanoid:inst|LessThan156~0 Arkanoid:inst|h_sync~1 } "NODE_NAME" } } { "arkanoid_header.v" "" { Text "G:/Verilog/Arkanoid2PDE1/arkanoid_header.v" 37 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(3.198 ns) + CELL(3.006 ns) 9.904 ns h_sync 5 PIN PIN_A11 0 " "Info: 5: + IC(3.198 ns) + CELL(3.006 ns) = 9.904 ns; Loc. = PIN_A11; Fanout = 0; PIN Node = 'h_sync'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "6.204 ns" { Arkanoid:inst|h_sync~1 h_sync } "NODE_NAME" } } { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { 96 856 1032 112 "h_sync" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.584 ns ( 46.28 % ) " "Info: Total cell delay = 4.584 ns ( 46.28 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "5.320 ns ( 53.72 % ) " "Info: Total interconnect delay = 5.320 ns ( 53.72 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "9.904 ns" { Arkanoid:inst|h_counter[0] Arkanoid:inst|Equal0~0 Arkanoid:inst|LessThan156~0 Arkanoid:inst|h_sync~1 h_sync } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "9.904 ns" { Arkanoid:inst|h_counter[0] {} Arkanoid:inst|Equal0~0 {} Arkanoid:inst|LessThan156~0 {} Arkanoid:inst|h_sync~1 {} h_sync {} } { 0.000ns 0.640ns 1.181ns 0.301ns 3.198ns } { 0.000ns 0.512ns 0.545ns 0.521ns 3.006ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.595 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Arkanoid:inst|h_counter[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.595 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Arkanoid:inst|h_counter[0] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.981ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } } { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "9.904 ns" { Arkanoid:inst|h_counter[0] Arkanoid:inst|Equal0~0 Arkanoid:inst|LessThan156~0 Arkanoid:inst|h_sync~1 h_sync } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "9.904 ns" { Arkanoid:inst|h_counter[0] {} Arkanoid:inst|Equal0~0 {} Arkanoid:inst|LessThan156~0 {} Arkanoid:inst|h_sync~1 {} h_sync {} } { 0.000ns 0.640ns 1.181ns 0.301ns 3.198ns } { 0.000ns 0.512ns 0.545ns 0.521ns 3.006ns } "" } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0 "" 0 -1}
{ "Info" "ITDB_TH_RESULT" "Debouncer:inst2\|button_reg\[0\] button1 clk_50MHz -1.772 ns register " "Info: th for register \"Debouncer:inst2\|button_reg\[0\]\" (data pin = \"button1\", clock pin = \"clk_50MHz\") is -1.772 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk_50MHz destination 4.606 ns + Longest register " "Info: + Longest clock path from clock \"clk_50MHz\" to destination register is 4.606 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.026 ns) 1.026 ns clk_50MHz 1 CLK PIN_L1 1 " "Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_L1; Fanout = 1; CLK Node = 'clk_50MHz'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk_50MHz } "NODE_NAME" } } { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { -168 -72 96 -152 "clk_50MHz" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.404 ns) + CELL(0.879 ns) 2.309 ns ClockDivider:inst1\|clk25MHz_ 2 REG LCFF_X1_Y13_N29 2 " "Info: 2: + IC(0.404 ns) + CELL(0.879 ns) = 2.309 ns; Loc. = LCFF_X1_Y13_N29; Fanout = 2; REG Node = 'ClockDivider:inst1\|clk25MHz_'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.283 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.703 ns) + CELL(0.000 ns) 3.012 ns ClockDivider:inst1\|clk25MHz_~clkctrl 3 COMB CLKCTRL_G0 1085 " "Info: 3: + IC(0.703 ns) + CELL(0.000 ns) = 3.012 ns; Loc. = CLKCTRL_G0; Fanout = 1085; COMB Node = 'ClockDivider:inst1\|clk25MHz_~clkctrl'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "0.703 ns" { ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl } "NODE_NAME" } } { "ClockDivider.v" "" { Text "G:/Verilog/Arkanoid2PDE1/ClockDivider.v" 7 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.992 ns) + CELL(0.602 ns) 4.606 ns Debouncer:inst2\|button_reg\[0\] 4 REG LCFF_X45_Y9_N9 2 " "Info: 4: + IC(0.992 ns) + CELL(0.602 ns) = 4.606 ns; Loc. = LCFF_X45_Y9_N9; Fanout = 2; REG Node = 'Debouncer:inst2\|button_reg\[0\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "1.594 ns" { ClockDivider:inst1|clk25MHz_~clkctrl Debouncer:inst2|button_reg[0] } "NODE_NAME" } } { "debouncer.v" "" { Text "G:/Verilog/Arkanoid2PDE1/debouncer.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.507 ns ( 54.43 % ) " "Info: Total cell delay = 2.507 ns ( 54.43 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "2.099 ns ( 45.57 % ) " "Info: Total interconnect delay = 2.099 ns ( 45.57 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.606 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Debouncer:inst2|button_reg[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.606 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Debouncer:inst2|button_reg[0] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.992ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TH_DELAY" "0.286 ns + " "Info: + Micro hold delay of destination is 0.286 ns" {  } { { "debouncer.v" "" { Text "G:/Verilog/Arkanoid2PDE1/debouncer.v" 9 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.664 ns - Shortest pin register " "Info: - Shortest pin to register delay is 6.664 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.874 ns) 0.874 ns button1 1 PIN PIN_T21 1 " "Info: 1: + IC(0.000 ns) + CELL(0.874 ns) = 0.874 ns; Loc. = PIN_T21; Fanout = 1; PIN Node = 'button1'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "" { button1 } "NODE_NAME" } } { "TotalScheme.bdf" "" { Schematic "G:/Verilog/Arkanoid2PDE1/TotalScheme.bdf" { { -72 -72 96 -56 "button1" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(5.377 ns) + CELL(0.413 ns) 6.664 ns Debouncer:inst2\|button_reg\[0\] 2 REG LCFF_X45_Y9_N9 2 " "Info: 2: + IC(5.377 ns) + CELL(0.413 ns) = 6.664 ns; Loc. = LCFF_X45_Y9_N9; Fanout = 2; REG Node = 'Debouncer:inst2\|button_reg\[0\]'" {  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "5.790 ns" { button1 Debouncer:inst2|button_reg[0] } "NODE_NAME" } } { "debouncer.v" "" { Text "G:/Verilog/Arkanoid2PDE1/debouncer.v" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.287 ns ( 19.31 % ) " "Info: Total cell delay = 1.287 ns ( 19.31 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "5.377 ns ( 80.69 % ) " "Info: Total interconnect delay = 5.377 ns ( 80.69 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "6.664 ns" { button1 Debouncer:inst2|button_reg[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "6.664 ns" { button1 {} button1~combout {} Debouncer:inst2|button_reg[0] {} } { 0.000ns 0.000ns 5.377ns } { 0.000ns 0.874ns 0.413ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1}  } { { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "4.606 ns" { clk_50MHz ClockDivider:inst1|clk25MHz_ ClockDivider:inst1|clk25MHz_~clkctrl Debouncer:inst2|button_reg[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "4.606 ns" { clk_50MHz {} clk_50MHz~combout {} ClockDivider:inst1|clk25MHz_ {} ClockDivider:inst1|clk25MHz_~clkctrl {} Debouncer:inst2|button_reg[0] {} } { 0.000ns 0.000ns 0.404ns 0.703ns 0.992ns } { 0.000ns 1.026ns 0.879ns 0.000ns 0.602ns } "" } } { "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/quartus/quartus/bin/TimingClosureFloorplan.fld" "" "6.664 ns" { button1 Debouncer:inst2|button_reg[0] } "NODE_NAME" } } { "c:/quartus/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/quartus/quartus/bin/Technology_Viewer.qrui" "6.664 ns" { button1 {} button1~combout {} Debouncer:inst2|button_reg[0] {} } { 0.000ns 0.000ns 5.377ns } { 0.000ns 0.874ns 0.413ns } "" } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 2 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "201 " "Info: Peak virtual memory: 201 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Mon May 28 14:22:38 2012 " "Info: Processing ended: Mon May 28 14:22:38 2012" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:08 " "Info: Total CPU time (on all processors): 00:00:08" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}