baf891d878
Implemented features: ball moving, platform moving, showing scores on digital table, game reset.
14 lines
196 B
Verilog
14 lines
196 B
Verilog
module ClockDivider (clk50MHz, clk25MHz);
|
|
input clk50MHz;
|
|
output clk25MHz;
|
|
|
|
reg clk25MHz_;
|
|
|
|
always @ (posedge clk50MHz)
|
|
begin
|
|
clk25MHz_ = ~clk25MHz_;
|
|
end
|
|
|
|
assign clk25MHz = clk25MHz_;
|
|
|
|
endmodule
|